Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
10/2007
10/30/2007US7288974 Wave correction clock and method
10/30/2007US7288973 Method and apparatus for fail-safe resynchronization with minimum latency
10/30/2007CA2296312C Frequency synthesizer systems and methods for three-point modulation with a dc response
10/30/2007CA2242209C Process, voltage, temperature independent switched delay compensation scheme
10/25/2007WO2005109732A8 Low power direct conversion rf transceiver architecture and asic and systems including such
10/25/2007US20070250284 Semiconductor integrated circuit and testing method for the same
10/25/2007US20070249275 Method and Apparatus for Tenderizing Meat
10/25/2007US20070248106 Method for Implementing Resources Reservation in Access Configuration Mode in Next Generation Network
10/25/2007US20070247251 Noise immunity circuitry for phase locked loops and delay locked loops
10/25/2007US20070247250 Apparatus and method presenting a clock signal in response to receiving a drive signal
10/25/2007US20070247242 Quadrature voltage-controlled oscillator
10/25/2007US20070247238 Apparatus and method for phase lock loop gain control
10/25/2007US20070247236 Phase-locked loop filter capacitance with a drag current
10/25/2007US20070247235 Calibration techniques for phase-locked loop bandwidth
10/25/2007US20070247234 Method for mitigating single event effects in a phase locked loop
10/25/2007US20070247233 Fractional-N synthesizer system and method
10/25/2007US20070247202 Variable delay clock circuit and method thereof
10/25/2007US20070247201 Delay lock clock synthesizer and method thereof
10/25/2007US20070247200 Frequency Independent Control
10/25/2007US20070247199 Phase-locked loop apparatus having aligning unit and method using the same
10/24/2007EP1847121A1 Display device with speaker grill
10/24/2007EP1847020A1 Pll synthesiser provided with an improved vco pre-setting
10/24/2007EP1847012A2 Fractional-n offset phase locked loop
10/24/2007CN200966037Y High frequency sampler
10/24/2007CN101060336A Method and circuit for controlling the parallel operation of multipath coding integrated circuit
10/24/2007CN101060330A A broken number frequency division synthesizer
10/24/2007CN101060329A Spread spectrum period signal generator
10/24/2007CN101060328A Delay device and its method
10/24/2007CN101060327A Phase-locked loop having aligning unit and its implementing method
10/24/2007CN100345382C Exterded amount control device
10/24/2007CN100345378C Frequency modulation circuit
10/23/2007US7287235 Method of simplifying a circuit for equivalence checking
10/23/2007US7287200 Jitter applying circuit and test apparatus
10/23/2007US7286625 High-speed clock and data recovery circuit
10/23/2007US7286597 Methods and systems for adaptive receiver equalization
10/23/2007US7285999 Circuit for use in frequency or phase detector
10/23/2007US7285997 Delay locked loop circuit and method
10/23/2007US7285996 Delay-locked loop
10/23/2007US7285995 Charge pump
10/23/2007US7285994 Rotational frequency detector system
10/23/2007US7285989 Device for detection of power-off
10/18/2007WO2007117543A2 Phase-locked loop filter capacitance with a drag current
10/18/2007WO2007116379A1 Method and system for configuration of a phase-locked loop circuit
10/18/2007WO2007115626A1 Synchronizing assembly for the high-frequency transmitters of a common frequency network
10/18/2007WO2007037991A3 Tri-stating a phase locked loop to conserve power
10/18/2007WO2006124491A3 Noise-shaping amplifier with waveform lock
10/18/2007WO2006101687A3 Solid-state synchro/resolver converter
10/18/2007US20070241825 Phase Locked Loop Circuit
10/18/2007US20070241824 Method and apparatus for generating output signal
10/18/2007US20070241823 Rail-to-rail input voltage-controlled oscillating device
10/18/2007US20070241798 Delay locked loop having charge pump gain independent of operating frequency
10/18/2007US20070241797 Interface Circuit and a Clock Output Method Therefor
10/18/2007DE102007013405A1 Verfahren und integrierte Schaltung zum Steuern eines Oszillatorsignals A method and an integrated circuit for controlling an oscillator signal
10/17/2007EP1845622A2 Heterogeneous transceiver architecture for wide range programmability of programmable logic devices
10/17/2007EP1844549A1 Method and apparatus for initializing a delay locked loop
10/17/2007EP1844542A2 Digital phase detector for a phase locked loop
10/17/2007EP1421463B1 Phase locked loops fast power up methods and apparatus
10/17/2007EP1342322B1 Radio transceiver having a phase-locked loop circuit
10/17/2007CN200962589Y Ultra-small frequency synthesizer
10/17/2007CN101056244A Method and system for realizing the carrier intercommunication based on the virtual relay
10/17/2007CN101056195A Data synchronization method between the main board and spare board in the communication system
10/17/2007CN101056183A Buffer-based magnitude charging middle message processing method
10/17/2007CN101056105A Compound MOS capacitor and phase-locked loop
10/17/2007CN101056104A Delay locked loop having charge pump gain independent of operating frequency
10/17/2007CN100344065C Voltage-controlled oscillator presetting circuit
10/17/2007CN100344064C Oscillation device and mobile communication apparatus
10/17/2007CN100343907C Phase locked loop for controlling recordable optical disc drive and method thereof
10/16/2007US7284173 Built-in self-test circuit for phase locked loops, test method and computer program product therefor
10/16/2007US7283801 Circuit arrangement for phase locked loop, and phase locked loop based method to be used in cellular network terminals
10/16/2007US7283796 Electronic tuning system
10/16/2007US7283602 Half-rate clock and data recovery circuit
10/16/2007US7283010 Power supply compensated voltage and current supply
10/16/2007US7283008 Oscillator circuit with temperature compensation function
10/16/2007US7283004 Phase locked loop filter
10/16/2007US7283002 Phase locked loop with a modulator
10/16/2007US7283001 Noise-shaping amplifier with waveform lock
10/16/2007US7283000 Auto-adjusting high accuracy oscillator
10/16/2007US7282999 Method and device for generating a clock signal using a phase difference signal and a feedback signal
10/16/2007US7282976 Apparatus and method for duty cycle correction
10/16/2007US7282975 Apparatus and method to control self-timed and synchronous systems
10/16/2007US7282974 Delay locked loop
10/16/2007US7282973 Enhanced DLL phase output scheme
10/16/2007US7282972 Bias generator with feedback control
10/16/2007US7282971 Digital delay lock loop
10/16/2007US7282967 Fixed frequency clock output having a variable high frequency input clock and an unrelated fixed frequency reference signal
10/11/2007WO2007114705A1 Phase locked oscillator
10/11/2007WO2007114523A1 Digital processing apparatus
10/11/2007WO2007114501A1 Pll device
10/11/2007WO2007114498A1 Pll device
10/11/2007WO2007114054A1 Frequency synthesizer
10/11/2007US20070236297 Semiconductor integrated circuit device for communication
10/11/2007US20070236265 Power-on reset circuit using flip-flop and semiconductor device having such power-on reset circuit
10/11/2007US20070236260 Supply voltage sensing circuit
10/11/2007DE10153751B4 Vorrichtung und Verfahren zur Takterzeugung Apparatus and method for clock generation
10/10/2007EP1843478A1 PLL structure for providing local oscillator signals for as transceiver.
10/10/2007EP1843472A1 Method for mitigating single event effects in a phase locked loop
10/10/2007EP1842288A2 Circuits and methods of generating and controlling signals on an integrated circuit
10/10/2007EP1606880B1 Frequency divider with variable division rate
10/10/2007EP1485989B8 Oscillator and pll circuit using the same
10/10/2007CN101051985A Method for realizing virtual special net access