Patents
Sitemap › H03 - Basic electronic circuitry › H03L - Automatic control, starting, synchronisation, or stabilisation of generators of electronic oscillations or pulses › H03L 7 - Automatic control of frequency or phase; Synchronisation
Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
08/2007
08/23/2007US20070194820 Phase delay detection apparatus and method with multi-cycle phase range of operation
08/23/2007US20070194819 Method for synchronizing a clock signal with a reference signal, and phase locked loop
08/23/2007US20070194818 Phase locked loop circuit having set initial locking level and control method thereof
08/23/2007US20070194817 Spread-spectrum clocking
08/23/2007US20070194811 Method and arrangement for interference compensation in a voltage-controlled frequency generator
08/23/2007DE102006007022A1 Volldigitales PLL-System (ADPLL-System) All-digital PLL system (ADPLL) system
08/22/2007EP1821411A1 Clock signal generator
08/22/2007EP1821403A1 Phase frequency detector with a novel D flip flop
08/22/2007EP1820274A4 Method and apparatus for precise open loop tuning of reference frequency within a wireless device
08/22/2007EP1820274A1 Method and apparatus for precise open loop tuning of reference frequency within a wireless device
08/22/2007EP1820271A2 Jitter reduction circuit and frequency synthesizer.
08/22/2007CN1333538C Digital phase-lock method for clock signal in radio-frequency Layuan module
08/22/2007CN1333522C CMOS digital control LC oscillator on chip
08/22/2007CN101022629A Update rank processing method and device for lasting service allocation list
08/22/2007CN101022265A Frequency modulator and fm sending circuit using same
08/21/2007US7260753 Methods and apparatus for providing test access to asynchronous circuits and systems
08/21/2007US7259633 Frequency synthesizer with loop filter calibration for bandwidth control
08/21/2007US7259602 Method and apparatus for implementing fault tolerant phase locked loop (PLL)
08/21/2007US7259601 Apparatus and method for suppressing jitter within a clock signal generator
08/21/2007US7259600 Scalable integrated circuit architecture
08/21/2007US7259599 Semiconductor device
08/16/2007WO2007092282A1 System and method for compensating for modulation induced frequency shift during transmission of a radio frequency signal
08/16/2007WO2007091516A1 Phase synchronization loop type frequency synthesizer of fractional n-type, and phase shift circuit with frequency converting function
08/16/2007WO2007090753A1 Oscillator gain equalization
08/16/2007US20070192651 Low-Speed DLL Employing a Digital Phase Interpolator based upon a High-Speed Clock
08/16/2007US20070189195 Method and apparatus for use in carrier recovery in a communications system
08/16/2007US20070188256 High gain, high frequency CMOS oscillator circuit and method
08/16/2007US20070188246 Oscillator operable in various frequencies
08/16/2007US20070188245 Calibrating an oscillator and corresponding calibration device
08/16/2007US20070188244 Harmonic Characterization and Correction of Device Mismatch
08/16/2007US20070188243 Frequency tuning range extension and modulation resolution enhancement of a digitally controlled oscillator
08/16/2007US20070188242 Phase locked loop for stably operating in a matter that is insensitive to variation in process, voltage and temperature and method of operating the same
08/16/2007US20070188241 Oscillator array, and synchronization method of the same
08/16/2007US20070188206 Delay locked loop with a function for implementing locking operation periodically during power down mode and locking operation method of the same
08/16/2007US20070188205 Differential charge pump
08/16/2007US20070188204 Retiming circuits for phase-locked loops
08/16/2007US20070188203 Semiconductor integrated circuit having built-in PLL circuit
08/16/2007US20070188202 Power control circuit
08/16/2007DE102006007094B3 Verfahren zur Synchronisation eines Taktsignals auf ein Referenzsignal und Phasenregelkreis Method for synchronizing a clock signal to a reference signal and phase-locked loop
08/16/2007DE102004014695B4 Takt- und Datenwiedergewinnungseinheit Clock and data recovery unit
08/15/2007EP1819051A2 Delay-Locked Loop Circuits
08/15/2007EP1819050A1 Delay line calibration circuit comprising asynchronous arbiter element
08/15/2007CN1332508C Phase-locked-loop with reduced clock jitter
08/15/2007CN101019324A Compensated high-speed pll circuit
08/15/2007CN101019323A Low power and low timing jitter phase-lock loop and method
08/15/2007CN101018056A Rb atom frequency standard digital servo device
08/15/2007CN101018049A Delay line and delay phase locked loop
08/14/2007US7257731 System and method for managing protocol network failures in a cluster system
08/14/2007US7257184 Phase comparator, clock data recovery circuit and transceiver circuit
08/14/2007US7257183 Digital clock recovery circuit
08/14/2007US7257154 Multiple high-speed bit stream interface circuit
08/14/2007US7256657 Voltage controlled oscillator having digitally controlled phase adjustment and method therefor
08/14/2007US7256656 All-digital phase-locked loop
08/14/2007US7256655 Phase-locked loop apparatus and method thereof
08/14/2007US7256635 Low lock time delay locked loops using time cycle suppressor
08/14/2007US7256631 Charge pump with balanced and constant up and down currents
08/14/2007US7256630 System and method for PLL control
08/14/2007US7256629 Phase-locked loops
08/14/2007US7256628 Speed-matching control method and circuit
08/14/2007US7256627 Alignment of local transmit clock to synchronous data transfer clock having programmable transfer rate
08/09/2007WO2007088595A1 Pll circuit and semiconductor integrated device
08/09/2007US20070182503 Oscillator having low phase noise
08/09/2007US20070182495 Oscillator systems and methods
08/09/2007US20070182494 Methods for auto-calibration and fast tuning of voltage controlled oscillators in phase-lock loops
08/09/2007US20070182493 Oscillator, pll oscillator, radio apparatus
08/09/2007US20070182492 Circuits and methods for phase locked loop lock window detection
08/09/2007US20070182472 Duty correction circuit of digital type for optimal layout area and current consumption
08/09/2007US20070182471 DLL circuit and method of controlling the same
08/09/2007US20070182470 Device and method for the synchronization of clock signals and adjustment of the duty cycle of the clock signal
08/09/2007US20070182469 Temperature compensation via power supply modification to produce a temperature-independent delay in an integrated circuit
08/09/2007US20070182468 Clock signal synchronizing device, and clock signal synchronizing method
08/09/2007US20070182467 DPLL circuit having holdover function
08/09/2007US20070182466 Reset detector
08/09/2007US20070182465 Method and System for Synchronizing Phase of Triangular Signal
08/09/2007DE112005002250T5 Phasenverzögerungsregelkreis, Phasenregelkreis, Synchronisiereinheit, Halbleiterprüfvorrichtung und integrierte Halbleiterschaltung Phase delay locked loop, PLL, synchronizing, semiconductor test and semiconductor integrated circuit
08/09/2007DE102007001148A1 Phasenregelschleife zum schnellen Einregeln und darauf bezogenes Verfahren Phase-locked loop to adjust it fast and related method
08/08/2007EP1816816A1 Two-point modulation type phase modulating apparatus, polar modulation transmitting apparatus, radio transmitting apparatus, and wireless communication apparatus
08/08/2007EP1816749A1 Device and method for adjusting PLL loop filter gain in an automatic frequency controller
08/08/2007EP1816748A1 Phase control circuit
08/08/2007EP1816741A1 Phase detector
08/08/2007EP1573912B1 Coarse delay tuner circuits with edge suppressors in delay locked loops
08/08/2007CN1331321C 电路结构 Circuit structure
08/08/2007CN1331149C Phase frequency comparing equipment
08/08/2007CN101015124A PLL frequency synthesizer
08/08/2007CN101015022A Dll circuit
08/08/2007CN101014166A Network reprogramming method of wireless sensor network based on priority cluster
08/08/2007CN101013897A Variable signal delaying circuit, quadrature frequency converter and radio frequency tuner
08/08/2007CN101013894A Phase locked loop with wide frequency-locking range and operational method thereof
08/08/2007CN101013893A 频率合成器 Frequency synthesizer
08/08/2007CN101013892A Phase-locked loop
08/07/2007US7254505 Method and apparatus for calibrating delay lines
08/07/2007US7254208 Delay line based multiple frequency generator circuits for CDMA processing
08/07/2007US7254205 Signal processing method and apparatus for ensuring a desired relationship between signals
08/07/2007US7254201 Clock and data recovery circuit and method
08/07/2007US7254183 Dual link DVI transmitter serviced by single phase locked loop
08/07/2007US7253844 Method and arrangement for synchronising on-screen display functions during analog signal reception
08/07/2007US7253842 Locking display pixel clock to input frame rate
08/07/2007US7253695 Function generating circuit and temperature characteristic controlling method for function generating circuit
08/07/2007US7253693 Method and apparatus for noise compensation in an oscillator circuit
08/07/2007US7253692 Phase locked loop
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