Patents
Sitemap › H03 - Basic electronic circuitry › H03L - Automatic control, starting, synchronisation, or stabilisation of generators of electronic oscillations or pulses › H03L 7 - Automatic control of frequency or phase; Synchronisation
Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
03/2007
03/29/2007US20070069772 Delay locked loop circuit
03/28/2007EP1768261A1 Clock adjustment apparatus and method thereof
03/28/2007EP1768260A1 Clock adjustment apparatus and method thereof
03/28/2007EP1766780A1 Ultra-fast hopping frequency synthesizer for multi-band transmission standards
03/28/2007CN1938951A Fast phase-frequency detector arrangement
03/28/2007CN1937810A Communication apparatus and display method
03/28/2007CN1937578A Access business service quality control device and method
03/28/2007CN1937485A High speed signal phase control method and device
03/28/2007CN1937411A System and method for signal filtering in a phase-locked loop system
03/28/2007CN1937410A Adaptive process and temperature compensated high frequency ring-oscillating phase-locking ring circuit
03/28/2007CN1937400A Direct digital synthesizer, direct digital synthesizer for transmission and detection, and mri apparatus
03/28/2007CN1936606A Apparatus for measuring entrance phase position of Tokamak low-noise-wave antenna array and phase-appraising method
03/28/2007CN1307800C Integrated circuit timing debug apparatus and method
03/28/2007CN1307505C Clock control system and clock control method
03/27/2007US7197725 Semiconductor integrated circuit and testing method for the same
03/27/2007US7197659 Global I/O timing adjustment using calibrated delay elements
03/27/2007US7197102 Method and apparatus for clock-and-data recovery using a secondary delay-locked loop
03/27/2007US7197101 Phase interpolator based clock recovering
03/27/2007US7197099 Delay circuit with timing adjustment function
03/27/2007US7196998 Method of determining ADIP information through counting identical bits and different bits
03/27/2007US7196967 Semiconductor integrated circuit
03/27/2007US7196588 Auto-gain controlled digital phase-locked loop and method thereof
03/27/2007US7196587 Waveform lineariser
03/27/2007US7196562 Programmable clock drivers that support CRC error checking of configuration data during program restore operations
03/27/2007US7196561 Programmable reset signal that is independent of supply voltage ramp rate
03/27/2007US7196424 Semiconductor device
03/22/2007WO2007033120A1 Analog varactor
03/22/2007WO2007032137A1 Oscillator, pll circuit, receiver and transmitter
03/22/2007WO2007031788A1 Frequency synthesizer with fine resolution
03/22/2007WO2007030946A2 Apparatus and method of making pulse-shape measurements and method of correlating to rising chip edges
03/22/2007WO2007030860A1 A method and apparatus adapted to demodulate a data signal
03/22/2007WO2007011454A3 Agc circuit for the reduction of harmonics in the drive signal
03/22/2007US20070064853 Techniques to reduce transmitted jitter
03/22/2007US20070063776 Semiconductor integrated circuit with clock generator
03/22/2007US20070063775 Low frequency clock generation
03/22/2007US20070063750 Timing vernier using a delay locked loop
03/22/2007US20070063749 Matched current delay cell and delay locked loop
03/22/2007US20070063748 Delay locked loop structure providing first and second locked clock signals
03/22/2007DE112005000895T5 Verteilte Schleifenkomponenten Distributed loop components
03/22/2007DE102006040822A1 Verfahren und Vorrichtung zur Erzeugung eines Ausgangssignals mit einer bestimmten Phasenverschiebung gegenüber einem Eingangssignal Method and apparatus for generating an output signal having a certain phase shift with respect to an input signal
03/22/2007CA2622484A1 Apparatus for and method of correlating to rising chip edges
03/21/2007EP1764922A1 Clock generation circuit and clock generation method
03/21/2007EP1057281B1 Compensation for phase errors caused by clock jitter in a cdma communication system
03/21/2007CN1934786A Variable delay line using two blender delays
03/21/2007CN1933626A Double-mode mobile terminal
03/21/2007CN1933413A Group broadcasting member management method for radio local network IP group broadcasting frame transmission
03/21/2007CN1306699C Clock and data recovery circuit
03/21/2007CN1306698C Apparatus for generating multiple clock signals of different frequency characteristics
03/20/2007US7194651 Distributed link module architecture
03/20/2007US7194279 Adjustment of a phase difference between two signals
03/20/2007US7193942 Phase difference correction apparatus and data reproduction apparatus including data header detection apparatus
03/20/2007US7193929 Semiconductor integrated circuit
03/20/2007US7193907 Semiconductor integrated circuit having a power-on reset circuit in a semiconductor memory device
03/20/2007US7193692 Laser range finder and method to measure a distance
03/20/2007US7193480 Voltage controlled oscillator, PLL circuit, pulse modulation signal generating circuit, semiconductor laser modulation device and image forming apparatus
03/20/2007US7193479 Local oscillator circuit
03/20/2007US7193455 Programmable/tunable active RC filter
03/15/2007WO2007030189A2 Rf synthesizer and rf transmitter or receiver incorporating the synthesizer
03/15/2007WO2007029513A1 Timing generator, test device, and timing generation method
03/15/2007WO2007029428A1 Pll circuit
03/15/2007WO2007029022A1 Charge pump circuit
03/15/2007WO2006111899A3 Circuit arrangement, in particular phase-locked loop, as well as corresponding method
03/15/2007US20070060090 Phase-lock loop, method for frequency switching in a phase-lock loop, and use of said phase-lock loop
03/15/2007US20070058579 Method for processing calls from multiple communication networks and equipment thereof
03/15/2007US20070057830 Apparatus and method for spectrally shaping a reference clock signal
03/15/2007US20070057738 Oscillator device and transmission and reception device
03/15/2007US20070057737 Compensation for modulation distortion
03/15/2007US20070057736 Feedback system incorporating slow digital switching for glitch-free state changes
03/15/2007US20070057735 Voltage-controlled oscillator for low-voltage, wide frequency range operation
03/15/2007US20070057734 Oscillatory circuit having two oscillators
03/15/2007US20070057710 Timing adjustment circuit and method thereof
03/15/2007US20070057709 Clock generation circuit and clock generation method
03/15/2007US20070057708 False lock detection mechanism for use in a delay locked loop circuit
03/14/2007EP1763276A2 Method for processing calls from multiple communication networks and equipment thereof
03/14/2007EP1762036A1 Adjustable free-running secure clock
03/14/2007EP1762004A1 Frequency synthesizer
03/14/2007CN1930781A Device comprising a frequency divider
03/14/2007CN1929447A Method and device for searching address prefixion and message transfer method and system
03/14/2007CN1929308A Phase locked loop with temperature compensation
03/14/2007CN1928615A Single beam magneto-optic well system
03/13/2007US7191081 Method for correcting an oscillator frequency
03/13/2007US7190906 Linear full-rate phase detector and clock and data recovery circuit
03/13/2007US7190755 Phase-locked loop circuitry for programmable logic devices
03/13/2007US7190742 Differential receiver circuit with electronic dispersion compensation
03/13/2007US7190237 Open-loop start-up method for a resonating device
03/13/2007US7190234 Current supply circuit, ring oscillator, nonvolatile semiconductor device and electronic card and electronic device
03/13/2007US7190231 High-performance charge-pump circuit for phase-locked loops
03/13/2007US7190202 Trim unit having less jitter
03/13/2007US7190201 Method and apparatus for initializing a delay locked loop
03/13/2007US7190200 Delay locked loop capable of performing reliable locking operation
03/13/2007US7190199 Scalable integrated circuit architecture with analog circuits
03/13/2007US7190198 Voltage controlled delay loop with central interpolator
03/13/2007US7190197 Clock phase detector for noise management
03/13/2007US7190196 Dual-edge synchronized data sampler
03/08/2007WO2007027031A1 Phase locked loop circuit and phase locked loop control method
03/08/2007WO2007025777A1 Oscillator circuit and method for influencing, controlling, or regulating the frequency of an oscillator
03/08/2007WO2006137031A3 Phase-locked loop systems using adaptive low-pass filters in switched bandwidth feedback loops
03/08/2007WO2006110907A3 Pll lock management system
03/08/2007US20070054644 Wireless Transmit-Only Apparatus and Method
03/08/2007US20070052849 Automatic frequency compensation of video signals transmitted across cables
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