Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
04/2007
04/26/2007US20070090885 Charge pump circuit and phase-locked loop circuit
04/26/2007US20070090884 Method, System and Apparatus for Reducing Oscillator Frequency Spiking During Oscillator Frequency Adjustment
04/26/2007US20070090883 Auto-adjusting high accuracy oscillator
04/26/2007US20070090882 Phase locked loop filter
04/26/2007US20070090881 Circuit to reset a phase locked loop after a loss of lock
04/26/2007US20070090864 Charge pump circuit with power management
04/26/2007US20070090863 Charge pump structure for reducing capacitance in loop filter of a phase locked loop
04/26/2007US20070090862 Apparatus and method of controlling and tuning a fine calibration for clock source synchronization in dual loop of hybrid phase and time domain
04/26/2007DE102005060472B3 Phase-locked loop-frequency generator for transmitting-/receiving device, has control unit including sigma-delta-modulator and designed to determine control words depending on signal that is provided by sigma-delta-modulator
04/26/2007DE10157437B4 Schaltungsanordnung zur Takt- und Datenrückgewinnung aus einem Empfangssignal Circuit arrangement for clock and data recovery from a received signal
04/25/2007EP1777831A1 Receiver apparatus and electronic device using the same
04/25/2007EP1777823A1 An improved lock detect circuit for a phase locked loop
04/25/2007EP1777807A2 Voltage-controlled oscillator with stable gain over a wide frequency range
04/25/2007CN1954499A Phase locked loop (PLL) circuit, its phasing method and operation analyzing method
04/25/2007CN1954494A Skew correction apparatus
04/25/2007CN1954492A Method and apparatus for synchronizing a clock generator in the presence of jittery clock sources
04/25/2007CN1953332A Clock generator and communication terminal using the same
04/25/2007CN1312841C Adapting device capable of converting picture element clock pulse into character clock pulse
04/24/2007US7210057 Low-speed DLL employing a digital phase interpolator based upon a high-speed clock
04/24/2007US7209852 Circuit for producing a variable frequency clock signal having a high frequency low jitter pulse component
04/24/2007US7209525 Clock and data recovery with extended integration cycles
04/24/2007US7209017 Symmetrical linear voltage controlled oscillator
04/24/2007US7209011 Method and apparatus for synthesizing high-frequency signals for wireless communications
04/24/2007US7209009 Controlling a voltage controlled oscillator in a bang-bang phase locked loop
04/24/2007US7209008 Multiple output phase-locked loop (PLL) using a single voltage controlled oscillator (VCO)
04/24/2007US7208991 Digitally programmable delay circuit with process point tracking
04/24/2007US7208990 Low noise microwave frequency synthesizer having loop accumulation
04/24/2007US7208989 Synchronous clock generator including duty cycle correction
04/24/2007US7208988 Clock generator
04/24/2007US7208987 Reset initialization
04/24/2007US7208986 Measure-controlled delay circuits with reduced phase error
04/19/2007WO2007042928A2 Method and circuit for local clock generation and smartcard including it thereon
04/19/2007WO2006039543A9 Controlling the frequency of an oscillator
04/19/2007US20070088992 Phase error determination method and digital phase-locked loop system
04/19/2007US20070088517 Parameter correction circuit and parameter correction method
04/19/2007US20070087716 Wireless communication system
04/19/2007US20070086552 Digital phase locked loop for regenerating the clock of an embedded signal
04/19/2007US20070085624 Voltage controlled oscillator having digitally controlled phase adjustment and method therefor
04/19/2007US20070085616 A method for steering an oscillator and an oscillator
04/19/2007US20070085612 Synthesizer
04/19/2007US20070085611 Ultrasound medical devices, systems and methods
04/19/2007US20070085610 Phase locked loop circuit
04/19/2007US20070085581 Delayed locked loop circuit
04/19/2007US20070085580 Generating Multiple Delayed Signals of Different Phases from a Reference Signal Using Delay Locked Loop (DLL)
04/19/2007US20070085579 All digital phase locked loop architecture for low power cellular applications
04/19/2007US20070085578 Apparatus and method of generating power-up signal of semiconductor memory apparatus
04/19/2007US20070085573 Method and apparatus for switching on a voltage supply of a semiconductor circuit and corresponding semiconductor circuit
04/19/2007DE102006041892A1 Fraction-determining method for determining a fractional divisor ratio uses a discrete sigma-delta modulator to provide the fractional divisor ratio for a phase-locked loop
04/19/2007DE102005049578A1 Signalgenerator mit direkt ausleitbarer DDS-Signalquelle Signal generator with direct ausleitbarer DDS signal source
04/19/2007DE102005048409A1 Verstärkeranordnung für Ultra-Breitband-Anwendungen und Verfahren Amplifier arrangement for ultra-wideband applications and processes
04/18/2007EP1775843A1 Local oscillator with injection pulling suppression and spurious products filtering
04/18/2007EP1386400B1 Phase locked loop
04/18/2007CN1951016A Method and arrangement for interference compensation in a voltage-controlled frequency generator
04/18/2007CN1951015A Phase lock circuit and information reproduction device
04/18/2007CN1949910A Mobile communication system, base station controller and load state testing method thereof
04/18/2007CN1949743A Method for identifying net load type in multi-protocol sign exchange network
04/18/2007CN1949667A Oscillator circuit and infrared receiver
04/18/2007CN1948983A Apparatus and method of auto-regulating testing clock frequency
04/18/2007CN1311652C Wireless clock synchronization
04/18/2007CN1311629C Method and apparatus for digital frequency conversion
04/18/2007CN1311628C Differential ring oscillator stage
04/17/2007US7206956 Duty cycle distortion compensation for the data output of a memory device
04/17/2007US7206371 Transmitting and receiving apparatus capable of the suppression of the microphonic noise in digital transmission system
04/17/2007US7206370 Clock recovery circuit
04/17/2007US7206369 Programmable feedback delay phase-locked loop for high-speed input/output timing budget management and method of operation thereof
04/17/2007US7206368 Compensating jitter in differential data signals
04/17/2007US7206343 High resolution digital pulse width modulator for DC-DC voltage converter
04/17/2007US7205853 Method to configure phase-locked loop dividing ratio
04/17/2007US7205852 Method and apparatus for acquiring a frequency without a reference clock
04/17/2007US7205851 Semiconductor integrated circuit having a clock generation circuit
04/17/2007US7205850 Communication semiconductor integrated circuit device and a wireless communication system
04/17/2007US7205849 Phase locked loop including an integrator-free loop filter
04/17/2007US7205848 System and method for reducing the lock time of a phase locked loop circuit
04/17/2007US7205805 Adjusting power consumption of digital circuitry relative to critical path circuit having the largest propagation delay error
04/17/2007US7205804 Methods and system for reducing effects of digital loop dead zones
04/17/2007US7205803 High speed fully scaleable, programmable and linear digital delay circuit
04/17/2007US7205802 Apparatus and method for controlling a delay chain
04/17/2007US7205801 Power down circuit capable of a wide rage control signal regardless of the power supply voltage fluction
04/12/2007WO2007040928A1 Power supply noise suppressing in a pll-frequency synthesizer
04/12/2007WO2007040927A1 Receiver architectures utilizing coarse analog tuning and associated methods
04/12/2007WO2007040859A1 Voltage controlled delay line (vcdl) having embedded multiplexer and interpolation functions
04/12/2007WO2007040734A1 Communicating client phase information in an io system
04/12/2007WO2007039456A1 Method and apparatus for detecting frequency lock in a system including a frequency synthesizer
04/12/2007US20070082641 Single Chip Radio Receiver with Decoder and Controllable Baseband Filter
04/12/2007US20070080754 Voltage controlled oscillator with body bias control
04/12/2007US20070080753 Voltage controlled oscillator, pll circuit, pulse modulation signal generating circuit, semiconductor laser modulation device and image forming apparatus
04/12/2007US20070080752 Apparatus for low noise and jitter injection in test applications
04/12/2007US20070080751 Calibration circuit and operation method for voltage-controlled oscillator
04/12/2007US20070080729 Charge pump for PLL/DLL
04/12/2007US20070080728 Phase adjustment circuit
04/12/2007US20070080727 Startup circuit and method
04/12/2007US20070080726 Sequence-independent power-on reset for multi-voltage circuits
04/12/2007US20070080725 Power-up signal generator of semiconductor device
04/11/2007EP1772794A1 Method and circuit for local clock generation and smartcard including it thereon
04/11/2007EP1467488B1 Clock generating circuit
04/11/2007CN1947397A Method and apparatus for use in carrier recovery in communication system
04/11/2007CN1947339A System and method for clock signal synchronization
04/11/2007CN1947330A 可编程无线收发器 Programmable wireless transceivers
04/11/2007CN1947201A 多倍数据速率ram存储器控制器 Times the data rate ram memory controller
04/11/2007CN1947083A Distributed loop components