Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
07/2007
07/04/2007CN1992527A Switch-capacitor loop filter for signal generating circuit
07/04/2007CN1324835C PLL for clock recovery with initialization sequence
07/04/2007CN1324815C 信号相位跟踪网络 Signal phase tracking network
07/04/2007CN1324604C Oscillating clock generating circuit and method thereof
07/03/2007US7240232 Connection device capable of converting a pixel clock to a character clock
07/03/2007US7239681 System and method for maintaining a stable synchronization state in a programmable clock synchronizer
07/03/2007US7239651 Desynchronizer having ram based shared digital phase locked loops and sonet high density demapper incorporating same
07/03/2007US7239575 Delay-locked loop having a pre-shift phase detector
07/03/2007US7239212 Apparatus and method for phase lock loop gain control
07/03/2007US7239208 Device and method for frequency synthesis for wireline transceivers and similar devices
07/03/2007US7239190 Clock control method and circuit
07/03/2007US7239189 Clock generating circuit
07/03/2007US7239188 Locked-loop integrated circuits having speed tracking circuits therein
07/03/2007US7239187 Reset circuit and digital communication apparatus
07/03/2007CA2384091C Wideband voltage controlled oscillator with good noise immunity
07/03/2007CA2245739C Output stage for a low-current charge pump and demodulator integrating such a pump
06/2007
06/28/2007WO2007072731A1 Oscillation circuit, testing apparatus and electronic device
06/28/2007WO2007071822A1 Frequency generator arrangement
06/28/2007WO2006093599A3 Anti-gate leakage programmable capacitor
06/28/2007US20070149160 Frequency conversion in a receiver
06/28/2007US20070147566 Clock and data recovery with extended integration cycles
06/28/2007US20070146083 Calibration of oscillator devices
06/28/2007US20070146082 Frequency synthesizer, wireless communications device, and control method
06/28/2007US20070146081 System and Method for Charge-Pump with Phase-Frequency Detection Capability
06/28/2007US20070146028 Clock generator for semiconductor memory apparatus
06/28/2007US20070146027 Method for adjusting clock phase of monitor
06/28/2007US20070146026 Clock synchronization apparatus
06/28/2007US20070146025 Pulse-width control loop for clock with pulse-width ratio within wide range
06/28/2007US20070146024 Mixed-signal thermometer filter, delay locked loop and phase locked loop
06/28/2007US20070146023 Reset signal generating circuit and semiconductor integrated circuit device
06/28/2007DE102006054763A1 Differenzverstärker, Phasen- und Verzögerungsregelkreisvorrichtung und Differenzverstärkungsverfahren Differential amplifier, phase and delay locked loop device and differential amplification method
06/28/2007DE102006002680B3 Fully-digital phase locked loop system for producing analog oscillator signal, has sigma-delta-modulator whose input is connected with output of loop filter, where output of modulator modulates lowest-order bits of filter output
06/28/2007DE102004021398B4 Verfahren und Schaltungsanordnung zum Zurücksetzen einer integrierten Schaltung Method and circuit for resetting an integrated circuit
06/27/2007EP1800367A1 Reconfigurable radiation desensitivity bracket systems and methods
06/27/2007EP1499941B1 Altering operating frequency and voltage set point of a circuit in response to the operating temperature and instantaneous operating voltage of the circuit
06/27/2007EP1350323B1 Device and method in a semiconductor circuit
06/27/2007EP1039707B1 Digital radio receiver
06/27/2007CN2917103Y Automatic frequency control system in receiver
06/27/2007CN2917093Y Digital phase detection filter
06/27/2007CN1988481A Method for obtaining exact time and network device
06/27/2007CN1988389A Low phase noise frequency synthesizer
06/26/2007US7237216 Clock gating approach to accommodate infrequent additional processing latencies
06/26/2007US7237213 Process and device for timing analysis of a circuit
06/26/2007US7237136 Method and apparatus for providing symmetrical output data for a double data rate DRAM
06/26/2007US7236551 Linear half-rate phase detector for clock recovery and method therefor
06/26/2007US7236378 Signal distribution to a plurality of circuit units
06/26/2007US7236212 System and method for providing a low power receiver design
06/26/2007US7236063 Broadband modulation PLL, and modulation factor adjustment method thereof
06/26/2007US7236058 Low frequency doubler
06/26/2007US7236057 Spread spectrum clock generator
06/26/2007US7236028 Adaptive frequency variable delay-locked loop
06/26/2007US7236027 Jitter-resistive delay lock loop circuit for locking delayed clock and method thereof
06/26/2007US7236026 Circuit for and method of generating a frequency aligned clock signal
06/26/2007US7236025 PLL circuit and program for same
06/26/2007US7236024 Configurable circuit structure having reduced susceptibility to interference when using at least two such circuits to perform like functions
06/26/2007US7236023 Apparatus and methods for adaptive trip point detection
06/26/2007US7236022 Device and method for setting an initial value
06/21/2007WO2007069138A2 Electric circuit for and method of generating a clock signal
06/21/2007WO2007068283A1 Sensor interface
06/21/2007WO2007068088A1 Type ii phase locked loop using dual path and dual varactors to reduce loop filter components
06/21/2007US20070140115 Method for selection of an available transmission channel by sending a negative decision value and an additional positive decision value and corresponding base station, mobile terminal and mobile radio network
06/21/2007US20070139164 Radio frequency data communications device
06/21/2007US20070139130 Super-regenerative receiver
06/21/2007US20070139126 Digital phase and frequency detector
06/21/2007US20070139125 Magnetron
06/21/2007US20070139124 Frequency generator arrangement
06/21/2007US20070139089 Delay locked loop with precision contolled delay
06/21/2007US20070139088 High-speed divider with pulse-width control
06/21/2007DE112005001769T5 Oszillatorschaltung und Prüfvorrichtung Oscillator circuit and Tester
06/21/2007DE112005001762T5 Jittereinfügungsschaltung und Prüfvorrichtung Jittereinfügungsschaltung and Tester
06/21/2007DE102006051284A1 Duty cycle correction circuit for use in clock generation circuit, has shared charge pump receiving internal clock signals and outputting control signal based on clock signals, where charge pump compensates duty cycle errors
06/21/2007DE102005060944A1 Abstimmschaltung zu einer Frequenzabstimmung, Verwendung der Abstimmschaltung und Verfahren zur Frequenzabstimmung Tuning to a frequency tuning, use the tuning circuit and method for frequency tuning
06/21/2007DE102005060470A1 PLL-Frequenzgenerator PLL frequency synthesizer
06/21/2007CA2632006A1 Method and apparatus for capacitance multiplication within a phase locked loop
06/20/2007EP1798993A1 Remote access communication system and control method thereof
06/20/2007EP1798887A1 Isochronous synchronizer
06/20/2007EP1798859A1 PLL frequency generator
06/20/2007EP1798858A1 PLL frequency generator
06/20/2007EP1798568A2 Systems and methods for self-test of a radar altimeter
06/20/2007CN2914493Y Phase locking device and switch type controller including the phase locking device
06/20/2007CN1985441A Phase error cancellation
06/20/2007CN1983940A System and method combined on-line charge with off-line charge
06/20/2007CN1983820A Pll频率发生器 Pll Frequency Generator
06/20/2007CN1983819A Pll频率发生器 Pll Frequency Generator
06/20/2007CN1983818A Frequency tuning method for phase lock loop
06/20/2007CN1983817A Electric charge pump, phase-locking loop, method of regulating controlling current in electric charge pump and method of generating output signal
06/20/2007CN1983816A Self-adaptive phase-locked loop under high-low dynamic environment
06/20/2007CN1983815A Time-delay locking loop
06/20/2007CN1322678C Frequency plan
06/20/2007CN1322673C Integrated circuit,method and apparatus for fine tuning clock signals of an integrated circuit
06/19/2007US7233638 Sampling clock generator circuit and data receiver using the same
06/19/2007US7233637 Wideband communication using delay line clock multiplier
06/19/2007US7233215 Frequency modulation circuit
06/19/2007US7233214 Voltage-controlled oscillators with controlled operating range and related bias circuits and methods
06/19/2007US7233210 Spread spectrum clock generator
06/19/2007US7233186 Clock generation circuit capable of setting or controlling duty ratio of clock signal and system including clock generation circuit
06/19/2007US7233183 Wide frequency range DLL with dynamically determined VCDL/VCO operational states
06/19/2007US7233182 Circuitry for eliminating false lock in delay-locked loops
06/14/2007WO2007067237A2 Method and apparatus for loop filter size reduction
06/14/2007US20070133526 Remote access communication system and control method thereof