| Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643) |
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| 08/07/2007 | US7253691 PLL clock generator circuit and clock generation method |
| 08/07/2007 | US7253670 Phase synchronization circuit and semiconductor integrated circuit |
| 08/07/2007 | US7253669 High resolution digital loop circuit |
| 08/07/2007 | US7253668 Delay-locked loop with feedback compensation |
| 08/07/2007 | US7253667 Clock adjusting method and electronic device with clock adjusting function |
| 08/07/2007 | US7253567 Low-visual noise, jitterized pulse width modulation brightness control circuit |
| 08/07/2007 | CA2219079C Phase-locked loop |
| 08/02/2007 | WO2007086502A1 Vco driving circuit and frequency synthesizer |
| 08/02/2007 | WO2007085871A1 Frequency generation circuit |
| 08/02/2007 | WO2006101523A3 Low-latency start-up for a monolithic clock generator and timing/frequency reference |
| 08/02/2007 | US20070177703 Phase locked loop circuit and information reproduction apparatus |
| 08/02/2007 | US20070176695 Oscillator circuit and test apparatus |
| 08/02/2007 | US20070176694 Phase-locked loop using continuously auto-tuned inductor-capacitor voltage controlled oscillator |
| 08/02/2007 | US20070176693 Clock distribution system and method thereof |
| 08/02/2007 | US20070176692 Clock signal generating circuit |
| 08/02/2007 | US20070176691 Expanded pull range for a voltage controlled clock synthesizer |
| 08/02/2007 | US20070176690 Crystal oscillator emulator |
| 08/02/2007 | US20070176689 Power supply apparatus and high frequency circuit system |
| 08/02/2007 | US20070176658 Timing adjustment circuit |
| 08/02/2007 | US20070176657 Delay-locked loop circuit of a semiconductor device and method of controlling the same |
| 08/02/2007 | US20070176656 Delay-locked loop circuits |
| 08/02/2007 | US20070176655 Differential charge pump with open loop common mode |
| 08/02/2007 | US20070176654 Semiconductor memory device, power supply detector and semiconductor device |
| 08/02/2007 | DE112005001977T5 Mehrstufiger programmierbarer Johnson-Zähler Multistage programmable Johnson counter |
| 08/01/2007 | EP1814254A1 Binary phase detector and clock data recovery device |
| 08/01/2007 | EP1814230A1 Phase locked loop circuitry with digital loop filter |
| 08/01/2007 | EP1814229A1 Delay locked loop with selectable delay |
| 08/01/2007 | EP1814228A1 Digital phase locked loop system |
| 08/01/2007 | EP1813018A2 Symmetrical time/voltage conversion circuit |
| 08/01/2007 | EP1813017A1 Device for static phase error compensation in a phase-lock loop system with a symmetrical structure |
| 08/01/2007 | CN1330098C Device for generating wide tunable frequency using frequency divider |
| 08/01/2007 | CN1330095C Single crystal vibrator digital phase-locked loop device realizing E1/T1 debouncing |
| 08/01/2007 | CN1329788C Delay producing method, and delay producing circuit applied with them |
| 08/01/2007 | CN101009936A A verification method, device and communication system for the identification code of the temporary mobile user |
| 08/01/2007 | CN101009488A Clock and data recovery circuit, and SERDES circuit |
| 08/01/2007 | CN101009484A Novel single-end unit delay part |
| 08/01/2007 | CN101009483A Digital phase lock loop and its clock adjusting method |
| 08/01/2007 | CN101009430A Apparatus, method and computer program product for tracking information in an electric grid |
| 07/31/2007 | US7251573 Phase detector |
| 07/31/2007 | US7251305 Method and apparatus to store delay locked loop biasing parameters |
| 07/31/2007 | US7251296 System for clock and data recovery |
| 07/31/2007 | US7250981 Video signal processor and video signal processing method which interpolate a video signal using an interpolation factor based on phase information of a selected clock |
| 07/31/2007 | US7250906 Methods and apparatus for identifying asset location in communication networks |
| 07/31/2007 | US7250825 Method and apparatus for calibration of a low frequency oscillator in a processor based system |
| 07/31/2007 | US7250823 Direct digital synthesis (DDS) phase locked loop (PLL) frequency synthesizer and associated methods |
| 07/31/2007 | US7250821 Semiconductor integrated circuit |
| 07/31/2007 | US7250808 Differential charge pump circuit |
| 07/31/2007 | US7250802 Clock generator having a 50% duty-cycle |
| 07/31/2007 | US7250798 Synchronous clock generator including duty cycle correction |
| 07/31/2007 | US7250797 Event edge synchronization system and method of operation thereof |
| 07/26/2007 | WO2007084877A2 Phase-locked loop systems and methods |
| 07/26/2007 | WO2007084876A2 Systems and methods for reducing static phase error |
| 07/26/2007 | WO2007083924A1 Apparatus and method for processing oscillation signals in wireless communication system based tdd |
| 07/26/2007 | WO2007083635A1 Pll modulation circuit, radio transmission device, and radio communication device |
| 07/26/2007 | US20070170994 Rapid cycling medical synchrotron and beam delivery system |
| 07/26/2007 | US20070170990 Amplifier circuit with output delay selectively changed according to common mode voltage level, associated replica delay circuit and internal clock generator |
| 07/26/2007 | US20070170964 Low power and low timing jitter phase-lock loop and method |
| 07/26/2007 | US20070170963 Cpu frequency regulating circuit |
| 07/26/2007 | US20070170962 Low-power power-on reset circuit |
| 07/26/2007 | US20070170961 Circuit and method for generating circuit power on reset signal |
| 07/26/2007 | US20070170960 Reset signal generation circuit |
| 07/25/2007 | EP1811735A1 Wireless transceiver with modulation path delay calibration |
| 07/25/2007 | EP1811670A1 Number controlled oscillator and a method of establishing an event clock |
| 07/25/2007 | EP1811669A1 Phase locked loop architecture with partial cascode |
| 07/25/2007 | EP1810397A1 Method and apparatus for frequency synthesis |
| 07/25/2007 | CN101006646A Multi-stage programmable johnson counter |
| 07/25/2007 | CN101006642A Minimizing power consumption in high frequency digital circuits |
| 07/25/2007 | CN101005587A Method for providing information on digital TV receiver |
| 07/25/2007 | CN101005282A Differential-to-single-ended converter and phase-locked loop circuit having the same |
| 07/25/2007 | CN101005277A 数字时钟倍频器 Digital clock multiplier |
| 07/24/2007 | US7248664 Timesliced discrete-time phase locked loop |
| 07/24/2007 | US7248194 Bit-detection arrangement and apparatus for reproducing information |
| 07/24/2007 | US7248128 Reference oscillator frequency stabilization |
| 07/24/2007 | US7248123 Phase locked loop with floating capacitor boost circuit |
| 07/24/2007 | US7248122 Method and apparatus for generating a serial clock without a PLL |
| 07/24/2007 | US7248121 Variable lock-in circuit for phase-locked loops |
| 07/24/2007 | US7248087 Coarse delay tuner circuits with edge suppressors in delay locked loops |
| 07/24/2007 | US7248086 Leakage compensation for capacitors in loop filters |
| 07/24/2007 | US7248085 Internal reset signal generator for use in semiconductor memory |
| 07/19/2007 | WO2007082284A2 A current-mode gain-splitting dual-path vco |
| 07/19/2007 | WO2007082282A1 Configurable multi-modulus frequency divider for multi-mode mobile communication devices |
| 07/19/2007 | WO2007080918A1 Phase comparison circuit and pll synthesizer using the same |
| 07/19/2007 | WO2007080719A1 Clock generating circuit |
| 07/19/2007 | WO2007079640A1 Congestion control method for the reverse interface between the bts and the bsc, the device and the transceiver base station thereof |
| 07/19/2007 | WO2007030189A3 Rf synthesizer and rf transmitter or receiver incorporating the synthesizer |
| 07/19/2007 | US20070168791 Circuit and method for testing embedded phase-locked loop circuit |
| 07/19/2007 | US20070165594 Synchronization of time base units |
| 07/19/2007 | US20070164884 Clock pulse generator apparatus with reduced jitter clock phase |
| 07/19/2007 | US20070164835 All-Digital Phase Modulator/Demodulator Using Multi-Phase Clocks and Digital PLL |
| 07/19/2007 | US20070164829 Sigma-delta fractional-N PLL with reduced frequency error |
| 07/19/2007 | US20070164828 Communication semiconductor integrated circuit device and a wireless communication system |
| 07/19/2007 | US20070164827 Circuit and method for controlling an oscillation loop |
| 07/19/2007 | US20070164800 Delay locked loop with selectable delay |
| 07/19/2007 | US20070164799 Phase-locked loop systems and methods |
| 07/19/2007 | US20070164798 Systems and methods for reducing static phase error |
| 07/19/2007 | US20070164797 Method and apparatus to eliminate clock phase error in a multi-phase clock circuit |
| 07/19/2007 | US20070164796 Multifunctional timer/event counter device and method of using such a device |
| 07/19/2007 | US20070164793 Apparatus for generating clock pulses using a direct digital synthesizer |
| 07/19/2007 | DE102004050890B4 Datenempfänger mit servogesteuertem verzögertem Takt Data receiver comprising motorized delayed clock |
| 07/19/2007 | DE10149593B4 Einzelbit-sigma-delta-modulierter Bruch-N-Frequenz-Synthesizer Single-bit sigma-delta-modulated fractional-N frequency synthesizer |