Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
Patents for H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate (229,248)
08/2000
08/22/2000US6107154 Method of fabricating a semiconductor embedded dynamic random-access memory device
08/22/2000US6107149 CMOS semiconductor device comprising graded junctions with reduced junction capacitance
08/22/2000US6107146 Method of replacing epitaxial wafers in CMOS process
08/22/2000US6107143 Method for forming a trench isolation structure in an integrated circuit
08/22/2000US6107141 Flash EEPROM
08/22/2000US6107138 Method for fabricating a semiconductor device having a tapered contact hole
08/22/2000US6107137 Method of forming a capacitor
08/22/2000US6107135 Method of making a semiconductor memory device having a buried plate electrode
08/22/2000US6107134 High performance DRAM structure employing multiple thickness gate oxide
08/22/2000US6107128 Semiconductor device and method of manufacturing the same
08/22/2000US6107125 SOI/bulk hybrid substrate and method of forming the same
08/22/2000US6107124 Charge coupled device and method of fabricating the same
08/22/2000US6107105 Providing an opening to a diffusion region of an underlying substrate, forming a tintanium nitride layer to make contact with diffusion via the opening, patterning nitride layer into a bottom capacitor plate, forming dilectric and top plate
08/22/2000US6106734 Micromachine manufacture using gas beam crystallization
08/22/2000US6106352 Method for fabrication of organic electroluminescent device
08/17/2000WO2000048275A1 Silicon light-emitting device and method for the production thereof
08/17/2000WO2000048253A1 Integrated circuit comprising an inductor which prevents latch-up and a method for its manufacture
08/17/2000WO2000048252A2 Electrostatic discharge protection of integrated circuits
08/17/2000WO2000048238A1 Multilayer structure with controlled internal stresses and method for making same
08/17/2000WO2000048196A1 Programmable microelectronic devices and methods of forming and programming same
08/17/2000WO2000014806A9 Vertical bipolar transistor and method for the production thereof
08/17/2000CA2362920A1 Integrated circuit comprising an inductor which prevents latch-up and a method for its manufacture
08/17/2000CA2362428A1 Electrostatic discharge protection of integrated circuits
08/17/2000CA2362283A1 Programmable microelectronic devices and methods of forming and programming same
08/16/2000EP1028471A2 Electroluminescence display device
08/16/2000EP1028470A2 Solid-state image-sensing device and method for producing the same
08/16/2000EP1028469A2 Semiconductor device and method of manufacturing the same
08/16/2000EP1028468A1 Biasing circuit for isolation region in integrated power circuit
08/16/2000EP1028467A2 Semiconductor active fuse for AC power line and bidirectional switching device for the fuse
08/16/2000EP1028466A1 Method for manufacturing integrated devices including electromechanical microstructures, without residual stress
08/16/2000EP1028458A2 Chemical vapor deposition of silicate high dielectric constant materials
08/16/2000EP1028431A2 Shielded bitlines for static rams
08/16/2000EP1027741A1 Organic diodes with switchable photosensitivity
08/16/2000EP1027734A1 An electrically erasable programmable split-gate memory cell
08/16/2000EP1027732A1 Monolithic inductor
08/16/2000EP1027727A1 Diamond-based microactuator
08/16/2000EP1027723A2 Method of forming an electronic device
08/16/2000EP1027675A1 Method for continuous, non lot-based integrated circuit manufacturing
08/16/2000EP0788656B1 Solid-state switching element with two source electrodes and solid-state switch with such an element
08/16/2000EP0760162B1 Method for production of a structure with a low level of dislocations and having an oxide layer buried in a semiconductor substrate
08/16/2000EP0578935B1 Row redundancy circuit of a semiconductor memory device
08/16/2000CN1263637A A process for manufacturing IC-components to be used at radio frequencies
08/16/2000CN1263358A Formation of controllable slot top isolated layer for vertical transistor
08/16/2000CN1263279A Display device
08/16/2000CN1055569C 半导体装置及其制造方法 Semiconductor device and manufacturing method thereof
08/16/2000CN1055568C Nonvolatile semiconductor memory storage
08/16/2000CN1055567C Semiconductor device and signal processing system using the same semiconductor device
08/16/2000CN1055566C Semiconductor device
08/16/2000CN1055565C Method for selectively forming semiconductor regions
08/16/2000CN1055427C Fastener driving tool insert
08/15/2000US6105153 Semiconductor integrated circuit and its evaluating method
08/15/2000US6104653 Equilibration circuit and method using a pulsed equilibrate signal and a level equilibrate signal
08/15/2000US6104639 Memory cell with stored charge on its gate and process for the manufacture thereof
08/15/2000US6104636 Semiconductor memory which can store two or more bits of data in each memory cell
08/15/2000US6104633 Intentional asymmetry imposed during fabrication and/or access of magnetic tunnel junction devices
08/15/2000US6104632 Magnetic thin film memory and recording and reproducing method and apparatus using such a memory
08/15/2000US6104631 Static memory cell with load circuit using a tunnel diode
08/15/2000US6104630 Semiconductor storage device having spare and dummy word lines
08/15/2000US6104628 Integrated-circuit device with microprocessor of prescribed shape
08/15/2000US6104627 Semiconductor memory device
08/15/2000US6104589 Method of protecting an integrated circuit, method of operating integrated circuitry, and method of operating cascode circuitry
08/15/2000US6104588 Low noise electrostatic discharge protection circuit for mixed signal CMOS integrated circuits
08/15/2000US6104587 Positive temperature coefficient resistive element; specified combination of resistive element thickness and metal foil electrode thickness provide a device with good electrical performance without delamination or increase in resistance
08/15/2000US6104324 Coding/decoding method for reproducing data in high density and reproducing data, and apparatus therefor
08/15/2000US6104277 Polysilicon defined diffused resistor
08/15/2000US6104234 Substrate voltage generation circuit
08/15/2000US6104233 Substrate structure of semi-conductor device
08/15/2000US6104214 Current mode logic circuit, source follower circuit, and flip flop circuit
08/15/2000US6104095 Printed circuit board and chip-on-board packages using same
08/15/2000US6104094 Semiconductor device
08/15/2000US6104083 Lead frame used for semiconductor chips of different bit configurations
08/15/2000US6104081 Semiconductor device with semiconductor elements formed in a layer of semiconductor material glued on a support wafer
08/15/2000US6104080 Integrated circuit having capacitors for smoothing a supply voltage
08/15/2000US6104075 Semiconductor temperature sensor
08/15/2000US6104072 Analogue MISFET with threshold voltage adjuster
08/15/2000US6104070 Semiconductor device with reduced number of through holes and method of manufacturing the same
08/15/2000US6104068 Structure and method for improved signal processing
08/15/2000US6104067 Semiconductor device
08/15/2000US6104066 Circuit and method for low voltage, voltage sense amplifier
08/15/2000US6104061 Memory cell with vertical transistor and buried word and body lines
08/15/2000US6104059 Non-volatile memory having a silicide film on memory control gates and peripheral circuit transistor gates
08/15/2000US6104058 Method for improving the intermediate dielectric profile, particularly for non-volatile memories
08/15/2000US6104056 Semiconductor element and semiconductor memory device using the same
08/15/2000US6104055 Semiconductor device with memory cell having a storage capacitor with a plurality of concentric storage electrodes formed in an insulating layer and fabrication method thereof
08/15/2000US6104053 Semiconductor device comprising capacitor in logic circuit area and method of fabricating the same
08/15/2000US6104052 Semiconductor device adopting a self-aligned contact structure and method for manufacturing a semiconductor memory device
08/15/2000US6104050 Methods for fabricating integrated circuit devices including etching barrier layers and related structures
08/15/2000US6104049 Ferroelectric memory with ferroelectric thin film having thickness of 90 nanometers or less, and method of making same
08/15/2000US6104046 Dual-band infrared sensing material array and focal plane array
08/15/2000US6104045 High density planar SRAM cell using bipolar latch-up and gated diode breakdown
08/15/2000US6104038 Method for fabricating an array of ultra-small pores for chalcogenide memory cells
08/15/2000US6104021 Solid state image sensing element improved in sensitivity and production cost, process of fabrication thereof and solid state image sensing device using the same
08/15/2000US6103970 Solar cell having a front-mounted bypass diode
08/15/2000US6103622 Silicide process for mixed mode product with dual layer capacitor and polysilicon resistor which is protected with a capacitor protective oxide during silicidation of FET device
08/15/2000US6103621 Silicide process for mixed mode product with dual layer capacitor which is protected by a capacitor protective oxide during silicidation of FET device
08/15/2000US6103617 Fabricating method of multi-level wiring structure for semiconductor device
08/15/2000US6103610 Integrated circuit structure with dual thickness cobalt silicide layers and method for its manufacture
08/15/2000US6103600 Method for forming ultrafine particles and/or ultrafine wire, and semiconductor device using ultrafine particles and/or ultrafine wire formed by the forming method
08/15/2000US6103592 Manufacturing self-aligned polysilicon fet devices isolated with maskless shallow trench isolation and gate conductor fill technology with active devices and dummy doped regions formed in mesas
08/15/2000US6103587 Method for forming a stacked structure capacitor in a semiconductor device
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