Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/2012
07/05/2012US20120171869 Etching method
07/05/2012US20120171868 Resist underlayer film composition and patterning process using the same
07/05/2012US20120171867 Method for fabricating fine pattern by using spacer patterning technology
07/05/2012US20120171866 Substrate structure including functional region and method for transferring functional region
07/05/2012US20120171865 Method for fabricating fine patterns
07/05/2012US20120171864 Method of manufacturing semiconductor device
07/05/2012US20120171863 Metal silicide film forming method
07/05/2012US20120171862 Interconnect structure and method of making same
07/05/2012US20120171861 Methods of fabricating three-dimensional semiconductor device
07/05/2012US20120171860 Metal cap for back end of line (beol) interconnects, design structure and method of manufacture
07/05/2012US20120171859 Creation of vias and trenches with different depths
07/05/2012US20120171858 Method of manufacturing semiconductor device
07/05/2012US20120171857 Electrically programmable fuse using anisometric contacts and fabrication method
07/05/2012US20120171856 Nonvolatile semiconductor memory and manufacturing method thereof
07/05/2012US20120171855 Methods to adjust threshold voltage in semiconductor devices
07/05/2012US20120171854 Method for forming metal gate
07/05/2012US20120171853 Defect-free junction formation using octadecaborane self-amorphizing implants
07/05/2012US20120171852 Remote hydrogen plasma source of silicon containing film deposition
07/05/2012US20120171851 Patterned Substrate for Hetero-epitaxial Growth of Group-III Nitride Film
07/05/2012US20120171850 Semiconductor device and method of manufacturing semiconductor device
07/05/2012US20120171849 Apparatus for forming deposited film and method for forming deposited film
07/05/2012US20120171848 Method and System for Manufacturing Silicon and Silicon Carbide
07/05/2012US20120171847 Thin-film devices formed from solid particles
07/05/2012US20120171846 Method for fabricating semiconductor device with buried bit lines
07/05/2012US20120171845 Chuck for chemical vapor deposition systems and related methods therefor
07/05/2012US20120171844 Dicing die bonding film, semiconductor wafer, and semiconductor device
07/05/2012US20120171843 Microstructure, micromachine, and manufacturing method of microstructure and micromachine
07/05/2012US20120171842 Stress-generating shallow trench isolation structure having dual composition
07/05/2012US20120171841 Body contacted transistor with reduced parasitic capacitance
07/05/2012US20120171840 Capacitor and method for fabricating the same
07/05/2012US20120171839 Fabrication of semiconductor stacks with ruthenium-based materials
07/05/2012US20120171838 Resistor structure of phase change material and trimming method thereof
07/05/2012US20120171836 Method for Forming MEMS Variable Capacitors
07/05/2012US20120171835 Method for processing a glass substrate
07/05/2012US20120171834 Semiconductor device and method for manufacturing the same
07/05/2012US20120171832 Finfet with stressors
07/05/2012US20120171831 Asymmetric fet including sloped threshold voltage adjusting material layer and method of fabricating same
07/05/2012US20120171830 Asymmetric transistor devices formed by asymmetric spacers and tilted implantation
07/05/2012US20120171829 Semiconductor device and manufacturing method thereof
07/05/2012US20120171828 Method of Forming a FET Having Ultra-low On-resistance and Low Gate Charge
07/05/2012US20120171827 Structure and method to form edram on soi substrate
07/05/2012US20120171826 Method of fabricating semiconductor device
07/05/2012US20120171825 Semiconductor structure and method of fabricating the semiconductor structure
07/05/2012US20120171824 Heterostructure device and associated method
07/05/2012US20120171823 Method of fabricating thin film transistor
07/05/2012US20120171822 Manufacturing method for ltps tft array substrate
07/05/2012US20120171821 Method and structure for forming capacitors and memory devices on semiconductor-on-insulator (soi) substrates
07/05/2012US20120171820 Strained mos device and methods for its fabrication
07/05/2012US20120171819 Adaptive interconnect structure
07/05/2012US20120171818 Hybrid bonding interface for 3-dimensional chip integration
07/05/2012US20120171817 Single die output power stage using trench-gate low-side and ldmos high-side mosfets, structure and method
07/05/2012US20120171816 Integrated circuit package and method of making same
07/05/2012US20120171815 Cvd apparatus and method of forming semiconductor superlattice structure using the same
07/05/2012US20120171814 Semiconductor packages and methods of fabricating the same
07/05/2012US20120171813 Semiconductor device and manufacturing method thereof
07/05/2012US20120171812 Methods of forming germanium-antimony-tellurium materials and methods of forming a semiconductor device structure including the same
07/05/2012US20120171809 Method and Apparatus for Forming a Thin Lamina
07/05/2012US20120171799 Bypass diode for a solar cell
07/05/2012US20120171798 Damascene process for use in fabricating semiconductor structures having micro/nano gaps
07/05/2012US20120171795 Method of manufacturing a semiconductor device
07/05/2012US20120171794 Polysilicon thin film transistor device and method of fabricating the same
07/05/2012US20120171791 Method for fabricating light emitting diode chip
07/05/2012US20120171788 Ic card and booking-account system using the ic card
07/05/2012US20120171786 Apparatus for manufacturing solar cells and process for operating such apparatus
07/05/2012US20120171785 Manufacturing method of a semiconductor device
07/05/2012US20120171784 Magnetron-sputtering film-forming apparatus and manufacturing method for a semiconductor device
07/05/2012US20120171783 Ferroelectric memory and manufacturing method thereof, and manufacturing method of ferroelectric capacitor
07/05/2012US20120171622 Filter, exposure apparatus, and method of manufacturing device
07/05/2012US20120171621 Method for manufacturing electronic device and electronic device
07/05/2012US20120170999 Load lock device and processing system
07/05/2012US20120170359 Phase Change Memory With Fast Write Characteristics
07/05/2012US20120170358 MRAM cell structure
07/05/2012US20120170356 Semiconductor Memory Device with Hierarchical Bitlines
07/05/2012US20120170352 Thermo programmable resistor based rom
07/05/2012US20120170345 Stacked semiconductor device and method of manufacturing the same
07/05/2012US20120170221 Compliant vapor chamber chip packaging
07/05/2012US20120170162 Semiconductor package and fabrication method thereof
07/05/2012US20120169794 Pixel circuit, display device, and method of driving pixel circuit
07/05/2012US20120169262 Semiconductor device, method of manufacturing the same, and power module
07/05/2012US20120168970 Spacer formation film, method of manufacturing semiconductor wafer bonding product, semiconductor wafer bonding product and semiconductor device
07/05/2012US20120168968 Epoxy resin composition for encapsulating a semiconductor device, method of encapsulating a semiconductor device, and semiconductor device
07/05/2012US20120168965 Semiconductor device and a method of manufacturing the same
07/05/2012US20120168964 Probe Card and Method of Testing a Semiconductor Device
07/05/2012US20120168963 Semiconductor Device and Method of Forming Three-Dimensional Vertically Oriented Integrated Capacitors
07/05/2012US20120168959 Package substrate having a through hole and method of fabricating the same
07/05/2012US20120168958 Method and system for forming dummy structures in accordance with the golden ratio
07/05/2012US20120168957 Method to reduce depth delta between dense and wide features in dual damascene structures
07/05/2012US20120168956 Controlling density of particles within underfill surrounding solder bump contacts
07/05/2012US20120168955 Integrated Circuit Pattern and Method
07/05/2012US20120168952 Semiconductor device having a copper plug
07/05/2012US20120168950 Die structure, manufacturing method and substrate thereof
07/05/2012US20120168948 Copper pillar full metal via electrical circuit structure
07/05/2012US20120168947 Methods and Designs for Localized Wafer Thinning
07/05/2012US20120168946 Semiconductor device and production method therefor
07/05/2012US20120168945 Chip package structure and chip packaging process
07/05/2012US20120168944 Through hole via filling using electroless plating
07/05/2012US20120168943 Plasma treatment on semiconductor wafers
07/05/2012US20120168941 Stackable electronic package and method of making same
07/05/2012US20120168940 Apparatus and method of applying a film to a semiconductor wafer and method of processing a semiconductor wafer
07/05/2012US20120168939 Chip package and method for forming the same
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