Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/2012
07/11/2012CN102569198A Formation of a channel semiconductor alloy by a nitride hard mask layer and an oxide mask
07/11/2012CN102569197A Enhancement of ultraviolet curing of tensile stress liner using reflective materials
07/11/2012CN102569196A Method for simplifying layer number of manufacturing process photomasks with multiple threshold voltages
07/11/2012CN102569195A Embedded sigma-shaped semiconductor alloys formed in transistors by applying a uniform oxide layer
07/11/2012CN102569194A Protecting T-contacts of chip scale packages from moisture
07/11/2012CN102569193A Pixel structure and manufacturing method therefor
07/11/2012CN102569192A Method for manufacturing array substrate of semi-transmission and semi-reflection type liquid crystal display
07/11/2012CN102569191A Manufacturing method of array substrate of semi-penetration and semi-reflection liquid crystal display
07/11/2012CN102569190A Pixel structure and manufacturing method thereof
07/11/2012CN102569189A Semiconductor device and manufacturing method thereof
07/11/2012CN102569188A Thin film transistor array substrate and production method thereof
07/11/2012CN102569187A Low-temperature polysilicon display device and manufacturing method thereof
07/11/2012CN102569186A Array base plate and forming method thereof
07/11/2012CN102569185A Array substrate, production method thereof and liquid crystal display
07/11/2012CN102569184A Method for forming polysilicon fuse
07/11/2012CN102569183A Manufacturing method of multi-layer graphene vertical interconnected structure
07/11/2012CN102569182A Contact hole and manufacturing method thereof as well as semiconductor device
07/11/2012CN102569181A Method for manufacturing vertically interconnecting carbon nanotube bundle
07/11/2012CN102569180A Production method of power MOS (Metal Oxide Semiconductor) contact hole
07/11/2012CN102569179A Materials and methods of forming controlled voids in dielectric layers
07/11/2012CN102569178A Method for realizing high-performance copper interconnection by using upper mask
07/11/2012CN102569177A Method for realizing high-performance copper interconnection by using upper mask
07/11/2012CN102569176A Method for preparing dual Damascene structure
07/11/2012CN102569175A Method for producing a plug in a semiconductor body
07/11/2012CN102569174A Integrated circuit system with ultra-low K dielectric and method of manufacture thereof
07/11/2012CN102569173A Methods of manufacturing a semiconductor device
07/11/2012CN102569172A Structure and method for overlay marks
07/11/2012CN102569171A Wiring structure for improving crown-like defect and fabrication method thereof
07/11/2012CN102569170A Manufacturing method of interconnection structure
07/11/2012CN102569169A Interconnection method based on press printing technology
07/11/2012CN102569168A Manufacturing method of metal interconnection line
07/11/2012CN102569167A Method for forming dual damascene structure
07/11/2012CN102569166A Shallow groove isolation manufacturing method capable of improving stress and semiconductor device manufacturing method
07/11/2012CN102569165A Bottom up fill in high aspect ratio trenches
07/11/2012CN102569164A Semiconductor integrated circuit device
07/11/2012CN102569163A Manufacturing method of wafer-level uniaxial strain SOI (Silicon On Insulator) wafer based on AIN (Advanced Intelligent Network) buried insulating layer
07/11/2012CN102569162A Forming method of shallow groove isolating structure
07/11/2012CN102569161A Semiconductor device manufacturing method
07/11/2012CN102569160A Method for manufacturing semiconductor device
07/11/2012CN102569159A Method for manufacturing high-voltage semiconductor device
07/11/2012CN102569158A Isolation structure between semiconductor structures and forming method of isolation structure
07/11/2012CN102569157A Light-emitting diode (LED) drive chip with integrated power tube substrate isolated by reversed polarity ion implantation
07/11/2012CN102569156A Manufacturing method of buried layer of semiconductor device
07/11/2012CN102569155A Device for clamping planar disc
07/11/2012CN102569154A Wafer clamping device
07/11/2012CN102569153A Workholder
07/11/2012CN102569152A Robot for reversing panels of display apparatus
07/11/2012CN102569151A Silicon wafer mechanical hand
07/11/2012CN102569150A Device and method for clamping easily cleaned thin-walled disc
07/11/2012CN102569149A Swirling flow non-contact gas claw clamping device
07/11/2012CN102569148A Grabbing manipulator system for semiconductor packaging equipment
07/11/2012CN102569147A Silicon wafer adsorption mechanism and use method thereof
07/11/2012CN102569146A Cartridge regulating system
07/11/2012CN102569145A Method for correcting wafer position during quick annealing treatment
07/11/2012CN102569144A Through hole etching method
07/11/2012CN102569143A Diode polarity collating device
07/11/2012CN102569142A Silicon chip transfer apparatus, transfer support ring, and semiconductor technology reaction equipment
07/11/2012CN102569141A Substrate transfer equipment
07/11/2012CN102569140A Vacuum manipulator and wafer treatment system
07/11/2012CN102569139A Flower basket for flock preparing of single-crystalline-silicon solar cell
07/11/2012CN102569138A Wafer box
07/11/2012CN102569137A Tool and method for treating microelectronic workpieces and shelter structure
07/11/2012CN102569136A Method and apparatus for cleaning a substrate surface
07/11/2012CN102569135A Heating block for wire bonding
07/11/2012CN102569134A Plasma processing system ESC high voltage control
07/11/2012CN102569133A Liquid processing apparatus, and liquid processing method
07/11/2012CN102569132A Liquid processing apparatus
07/11/2012CN102569131A Heat treatment apparatus
07/11/2012CN102569130A Substrate processing apparatus and substrate processing method
07/11/2012CN102569129A Patterning device
07/11/2012CN102569128A Spin chuck for thin wafer cleaning
07/11/2012CN102569127A Apparatus for fabricating a flat panel display device and method thereof
07/11/2012CN102569126A Vertical heat treatment apparatus
07/11/2012CN102569125A Substrate processing apparatus, cover member therefor, tray therefor and substrate processing method
07/11/2012CN102569124A Substrate processing system, substrate processing apparatus and display method of substrate processing apparatus
07/11/2012CN102569123A Winding belt
07/11/2012CN102569122A Structure and method for testing quality of LED (Light Emitting Diode) side passivation layer
07/11/2012CN102569121A Method for detecting impurities inside wafer
07/11/2012CN102569120A Vertical detector of solar back panel
07/11/2012CN102569119A Chip or wafer detecting device
07/11/2012CN102569118A Yield increasing system of excursion management in semiconductor manufacturing process
07/11/2012CN102569117A Ion implantation beam line Faraday
07/11/2012CN102569116A Detection structure suitable for detecting source and drain conduction and detection method for detection structure
07/11/2012CN102569115A Detection method of semiconductor device defect
07/11/2012CN102569114A Metal lead size monitoring method
07/11/2012CN102569113A Edging width detection method
07/11/2012CN102569112A Cleaning room environment detection method
07/11/2012CN102569111A Pressure plate for wire bonding
07/11/2012CN102569110A Device and method for poor oxygen low-temperature sintering nano-silver soldering paste
07/11/2012CN102569109A Method for enlarging bonding area of chip
07/11/2012CN102569108A Tool for mounting solder ball
07/11/2012CN102569107A Preparation method of elastic contact interconnection structure of chip and electrode
07/11/2012CN102569106A Method and device for implementing high-power application of glass passivation diode
07/11/2012CN102569105A Wedge bonding method incorporating remote pattern recognition system
07/11/2012CN102569104A Imaging operations for a wire bonding system
07/11/2012CN102569103A Die bonder incorporating dual-head dispenser
07/11/2012CN102569102A Hermetic package method and structure of transistor base and transistor pin
07/11/2012CN102569101A Non-leaded package structure and manufacturing method thereof
07/11/2012CN102569100A Method for producing heat dissipation mass of semiconductor device
07/11/2012CN102569099A Packaging method of flip chip