Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/2012
07/12/2012WO2012057893A3 Multiple bonding layers for thin-wafer handling
07/12/2012WO2012057499A3 Resistive memory having rectifying characteristics or an ohmic contact layer
07/12/2012WO2012051380A3 Composition for and method of suppressing titanium nitride corrosion
07/12/2012WO2012051022A3 Method and apparatus for reducing particle defects in plasma etch chambers
07/12/2012WO2012050779A3 Memory arrays having different substantially vertical distances between adjacent memory cells
07/12/2012WO2012050321A3 Method and apparatus for manufacturing three-dimensional- structure memory device
07/12/2012WO2012037537A3 Sealed packaging for microelectromechanical systems
07/12/2012WO2012012138A3 Method for finishing silicon on insulator substrates
07/12/2012US20120179217 Planar Anode for Use in a Wet Electrolytic Capacitor
07/12/2012US20120178631 Substrate and method for the formation of continuous magnesium diboride and doped magnesium diboride wires
07/12/2012US20120178269 Semiconductor device manufacturing method
07/12/2012US20120178268 Plasma cvd method, method for forming silicon nitride film and method for manufacturing semiconductor device
07/12/2012US20120178267 Composition and method for low temperature deposition of silicon-containing films such as films including silicon, silicon nitride, silicon dioxide and/or silicon-oxynitride
07/12/2012US20120178266 Compositions and methods of use for forming titanium-containing thin films
07/12/2012US20120178265 Method of manufacturing semiconductor device using sod method
07/12/2012US20120178264 Method and apparatus for forming silicon nitride film
07/12/2012US20120178263 Substrate processing apparatus
07/12/2012US20120178262 Process for the manufacture of wafers for solar cells at ambient pressure
07/12/2012US20120178261 Silicon-containing composition having sulfonamide group for forming resist underlayer film
07/12/2012US20120178260 Multi-layer chip carrier and process for making
07/12/2012US20120178259 Method of cleaning silicon carbide semiconductor and apparatus for cleaning silicon carbide semiconductor
07/12/2012US20120178258 Method of processing a wafer
07/12/2012US20120178257 Solutions for cleaning semiconductor structures and related methods
07/12/2012US20120178256 Formation of a tantalum-nitride layer
07/12/2012US20120178255 Method for improving within die uniformity of metal plug chemical mechanical planarization process in gate last route
07/12/2012US20120178254 Method of fabricating semiconductor device having dielectric layer with improved electrical characteristics
07/12/2012US20120178253 Method of Manufacturing a Semiconductor Device Having a Porous, Low-K Dielectric Layer
07/12/2012US20120178252 Dummy Metal Design for Packaging Structures
07/12/2012US20120178251 Method of forming metal pillar
07/12/2012US20120178250 Testing wiring structure and method for forming the same
07/12/2012US20120178249 Manufacturing method of the semiconductor device
07/12/2012US20120178248 Method for making epitaxial structure
07/12/2012US20120178247 Producing transistor including multi-layer reentrant profile
07/12/2012US20120178246 Producing transistor including multiple reentrant profiles
07/12/2012US20120178245 Method for making epitaxial structure
07/12/2012US20120178244 Method for making epitaxial structure
07/12/2012US20120178243 Method for making semiconductor epitaxial structure
07/12/2012US20120178242 Method for making epitaxial structure
07/12/2012US20120178241 Conductive metal and diffusion barrier seed compositions, and methods of use in semiconductor and interlevel dielectric substrates
07/12/2012US20120178240 Thermal Budget Optimization for Yield Enhancement on Bulk Silicon Wafers
07/12/2012US20120178239 Programmable semiconductor device
07/12/2012US20120178238 Manufacturing method of soi substrate
07/12/2012US20120178237 Deep well structures with single depth shallow trench isolation regions
07/12/2012US20120178236 Method to improve wet etch budget in feol integration
07/12/2012US20120178235 Air Isolation In High Density Non-Volatile Memory
07/12/2012US20120178234 Method of manufacturing an integrated circuit device
07/12/2012US20120178233 Nanowire memory device and method of manufacturing the same
07/12/2012US20120178232 Field effect device structure including self-aligned spacer shaped contact
07/12/2012US20120178231 Methods for fabricating a metal silicide layer and semiconductor devices using the same
07/12/2012US20120178230 Method for fabricating trench dmos transistor
07/12/2012US20120178229 Semiconductor memory device with stacked gate including charge storage layer and control gate and method of manufacturing the same
07/12/2012US20120178228 Method for Forming Accumulation-mode Field Effect Transistor with Improved Current Capability
07/12/2012US20120178227 Replacement gate cmos
07/12/2012US20120178226 Semiconductor device and method of manufacturing the same
07/12/2012US20120178225 Producing transistor including reduced channel length
07/12/2012US20120178224 Method for manufacturing semiconductor device
07/12/2012US20120178223 Method of Manufacturing High Breakdown Voltage Semiconductor Device
07/12/2012US20120178222 Silicon controlled rectifiers (scr), methods of manufacture and design structures
07/12/2012US20120178221 Methods Of Forming Memory Arrays
07/12/2012US20120178220 Manufacturing method of semiconductor device
07/12/2012US20120178219 Methods for vacuum assisted underfilling
07/12/2012US20120178218 Semiconductor device having a semiconductor chip, and method for the production thereof
07/12/2012US20120178217 Method and apparatus for low inductive design pattern
07/12/2012US20120178216 Device including two mounting surfaces
07/12/2012US20120178215 Nitride Crystal with Removable Surface Layer and Methods of Manufacture
07/12/2012US20120178214 Routable array metal integrated circuit package fabricated using partial etching process
07/12/2012US20120178213 Chip scale package structure with can attachment
07/12/2012US20120178212 Wafer-to-wafer stack with supporting pedestal
07/12/2012US20120178211 Co-packaging approach for power converters based on planar devices, structure and method
07/12/2012US20120178210 Method of fabricating a resistive non-volatile memory device
07/12/2012US20120178209 Methods Of Forming Metal-Containing Structures, And Methods Of Forming Germanium-Containing Structures
07/12/2012US20120178206 Cmos image sensor having double gate insulator therein and method for manufacturing the same
07/12/2012US20120178203 Laser annealing for aluminum doping and formation of back-surface field in solar cell contacts
07/12/2012US20120178201 Composition for forming n-type diffusion layer, method for forming n-type diffusion layer, and method for producing photovoltaic cell
07/12/2012US20120178199 Imprinted Semiconductor Multiplex Detection Array
07/12/2012US20120178195 Method of Manufacturing a Light Emitting, Photovoltaic or Other Electronic Apparatus and System
07/12/2012US20120178189 Method for forming an over pad metalization (opm) on a bond pad
07/12/2012US20120178188 Method and apparatus for depositing phosphor on semiconductor light-emitting device
07/12/2012US20120177895 Method of patterning metal and assembly for forming a patterned metal film
07/12/2012US20120177891 Methods of forming a patterned, silicon-enriched developable antireflective material and semiconductor device structures including the same
07/12/2012US20120177079 Laser Hammering Technique for Aligning Members of a Constructed Array of Optoelectronic Devices
07/12/2012US20120177074 High reliability laser emitter modules
07/12/2012US20120176708 Esd protection devices and methods for forming esd protection devices
07/12/2012US20120176692 Focus ring and substrate processing apparatus having same
07/12/2012US20120176602 Apparatus and method for inspecting pattern
07/12/2012US20120176193 Driver for a semiconductor chip
07/12/2012US20120175812 Method of resin molding, resin molding apparatus and feeding handler
07/12/2012US20120175790 Composition for patternable adhesive film, patternable adhesive film, and method of manufacturing semiconductor package using the same
07/12/2012US20120175789 Alignment marks to enable 3d integration
07/12/2012US20120175781 Semiconductor device and method for manufacturing semiconductor device
07/12/2012US20120175780 Semiconductor component and method of making the same
07/12/2012US20120175779 Semiconductor Device and Method of Forming Integrated Passive Device
07/12/2012US20120175778 Semiconductor device, wafer structure and fabrication method thereof
07/12/2012US20120175777 Device having conductive substrate via with catch-pad etch-stop
07/12/2012US20120175774 Warpage control features on the bottomside of tsv die lateral to protruding bottomside tips
07/12/2012US20120175773 Thermal Enhanced Package Using Embedded Substrate
07/12/2012US20120175772 Alternative surface finishes for flip-chip ball grid arrays
07/12/2012US20120175770 Semiconductor Device and Method of Forming Conductive Pillars in Recessed Region of Peripheral Area around the Device for Electrical Interconnection to Other Devices
07/12/2012US20120175768 Semiconductor device and method for manufacturing the same
07/12/2012US20120175767 Semiconductor package with through silicon vias and method for making the same
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