Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
02/1990
02/14/1990EP0354294A2 Carousel-type apparatus for coating substrates
02/14/1990CN1039681A Technology for preparing electrode of gallium phosphide led
02/13/1990US4901326 Semiconductor laser device
02/13/1990US4901242 System for managing production of semiconductor devices
02/13/1990US4901137 Electronic apparatus having semiconductor device
02/13/1990US4901134 Polycrystalline silicon connectors
02/13/1990US4901133 Multilayer semi-insulating film for hermetic wafer passivation and method for making same
02/13/1990US4901131 Conductivity modulated metal oxide semiconductor field effect transistor
02/13/1990US4901126 Radiation detector
02/13/1990US4901121 Permeable base transistors without lithography of etching
02/13/1990US4901109 Alignment and exposure apparatus
02/13/1990US4901011 Carrier for transferring plate-like objects one by one, a handling apparatus for loading or unloading the carrier, and a wafer probing machine fitted with the handling apparatus for the wafer carrier
02/13/1990US4900974 Ion source
02/13/1990US4900939 System for processing and conveying substrate
02/13/1990US4900709 Applying a copper oxide-based material to a substrate pattern of two different materials to effect superconductivity when overlaying one and to be nonconductive on the other
02/13/1990US4900696 Method for patterning photo resist film
02/13/1990US4900695 Semiconductor integrated circuit device and process for producing the same
02/13/1990US4900694 Process for the preparation of a multi-layer stacked junction typed thin film transistor using seperate remote plasma
02/13/1990US4900693 Process for making polysilicon field plate with improved suppression of parasitic transistors
02/13/1990US4900692 Method of forming an oxide liner and active area mask for selective epitaxial growth in an isolation trench
02/13/1990US4900690 MOS semiconductor process with double-layer gate electrode structure
02/13/1990US4900689 Method of fabrication of isolated islands for complementary bipolar devices
02/13/1990US4900688 Pseudo uniphase charge coupled device fabrication by self-aligned virtual barrier and virtual gate formation
02/13/1990US4900582 Method for improving film quality of silica-based films
02/13/1990US4900501 Method and apparatus for encapsulating semi-conductors
02/13/1990US4900485 Method and apparatus for transfer molding
02/13/1990US4900411 Method of preparing a high-purity polycrystalline silicon using a microwave heating system in a fluidized bed reactor
02/13/1990US4900396 Method of forming modified layer and pattern
02/13/1990US4900395 HF gas etching of wafers in an acid processor
02/13/1990US4900386 Method of producing labels each having a circuit forming an oscillating circuit
02/13/1990US4900373 Sensitization pretreatment of Pb-salt epitaxial films for schottky diodes by sulfur vapor exposure
02/13/1990US4900372 III-V on Si heterostructure using a thermal strain layer
02/13/1990US4900363 Method and liquid preparation for removing residues of auxiliary sawing materials from wafers
02/13/1990US4900257 Method of making a polycide gate using a titanium nitride capping layer
02/13/1990US4900238 Scroll type compressor with releasably secured hermetic housing
02/13/1990US4900214 Method and apparatus for transporting semiconductor wafers
02/13/1990US4900212 Wafer pick out apparatus
02/13/1990US4899965 Apparatus for collectively fixing pipes
02/13/1990US4899921 Aligner bonder
02/13/1990US4899768 Wafer washing and drying apparatus
02/13/1990US4899767 Method and system for fluid treatment of semiconductor wafers
02/13/1990US4899719 Apparatus for collecting wafers
02/13/1990US4899685 Substrate coating equipment
02/13/1990CA1265868A1 High density read-only memory
02/13/1990CA1265853A1 Hermetic terminal assembly and method of manufacturing same
02/13/1990CA1265696A1 Multilayer dry-film positive-acting photoresist
02/08/1990WO1990001217A1 Avalanche photodiode structure
02/08/1990WO1990001216A1 Speed-up circuit for npn bipolar transistors
02/08/1990WO1990001215A1 Semiconductor device
02/08/1990WO1990000314A3 Method of activation of superconductors and devices produced thereby
02/08/1990DE3826582A1 Verfahren zur einbettung und stufenabflachung von strukturierten oberflaechen A method for embedding and stufenabflachung structured surface until
02/08/1990DE3823348A1 High-performance semiconductor component
02/07/1990EP0354193A2 Fabrication of CMOS integrated devices with reduced gate length and lightly doped drain
02/07/1990EP0354153A2 Vertical bipolar transistor
02/07/1990EP0354148A2 Apparatus for projecting a series of images onto dies of a semiconductor wafer
02/07/1990EP0354114A1 Method of building solder bumps and resulting structure
02/07/1990EP0354056A2 Coated electric devices and methods of manufacturing the same
02/07/1990EP0354020A2 Electronic probe
02/07/1990EP0353818A1 Process for depositing organosilanes on substrates of silicon or silicon oxide for devices of EOS or CHEMFET type
02/07/1990EP0353745A2 Method and device for the control of saw balde excursions during the cutting-off of wafers of non-magnetizable work pieces
02/07/1990EP0353719A2 Metal contact with overhanging edges and process of fabrication
02/07/1990EP0353693A2 Compound semiconductor mesfet device
02/07/1990EP0353671A2 Cooling apparatus
02/07/1990EP0353600A2 Aromatic diazonium salt, radiation sensitive composition containing the aromatic diazonium salt and method for formation of pattern using the radiation sensitive composition
02/07/1990EP0353583A2 Method for making thin silicone coatings
02/07/1990EP0353518A1 Process for preserving the surface of silicon wafers
02/07/1990EP0353470A2 Method and composition for improving silylation of resists
02/07/1990EP0353463A2 Method for circuit repair on integrated circuits and substrates
02/07/1990EP0353426A2 Semiconductor integrated circuit device comprising conductive layers
02/07/1990EP0353423A2 Unstrained defect-free epitaxial mismatched heterostructures and method of fabrication
02/07/1990EP0353414A2 Semiconductor device comprising conductive layers
02/07/1990EP0353308A1 Semiconductor device
02/07/1990EP0353271A1 Analog-to-digital converter made with focused ion beam technology.
02/07/1990EP0353245A1 Method and apparatus for ion etching and deposition
02/07/1990EP0353243A1 Improved density semicustom integrated circuit chip
02/07/1990EP0240526B1 Method and device for chemical treatment, particularly thermochemical treatment and chemical deposition in a large volume homogeneous plasma
02/07/1990EP0231326B1 Non-volatile semiconductor memories
02/07/1990CN1039504A Electric device and manufacturing method of same
02/07/1990CN1039449A Process for forming functional zinc oxide films using alkyl zinc compound and oxygen-containing gas
02/06/1990US4899355 X-ray lithography system
02/06/1990US4899354 Roentgen lithography method and apparatus
02/06/1990US4899308 High density ROM in a CMOS gate array
02/06/1990US4899208 Power distribution for full wafer package
02/06/1990US4899207 Outer lead tape automated bonding
02/06/1990US4899205 Electrically-programmable low-impedance anti-fuse element
02/06/1990US4899203 Semiconductor memory integrated circuit and process of fabricating the same
02/06/1990US4899099 Flex dot wafer probe
02/06/1990US4899060 Diaphragm system for generating a plurality of particle probes haivng variable cross section
02/06/1990US4899059 Disk scanning apparatus for batch ion implanters
02/06/1990US4898907 Compositions of platinum and rhodium catalyst in combination with hydrogen silsesquioxane resin
02/06/1990US4898841 Method of filling contact holes for semiconductor devices and contact structures made by that method
02/06/1990US4898840 Semiconductor integrated circuit device and a method of producing the same
02/06/1990US4898839 Semiconductor integrated circuit and manufacturing method therefor
02/06/1990US4898838 Method for fabricating a poly emitter logic array
02/06/1990US4898837 Method of fabricating a semiconductor integrated circuit
02/06/1990US4898836 Process for forming an integrated circuit on an N type substrate comprising PNP and NPN transistors placed vertically and insulated one from another
02/06/1990US4898835 Single mask totally self-aligned power MOSFET cell fabrication process
02/06/1990US4898834 Open-tube, benign-environment annealing method for compound semiconductors
02/06/1990US4898805 Method for fabricating hybrid integrated circuit
02/06/1990US4898804 Self-aligned, high resolution resonant dielectric lithography