Patents
Patents for G11C 16 - Erasable programmable read-only memories (44,373)
08/2006
08/01/2006US7085170 Method for erasing an NROM cell
08/01/2006US7085169 Flash memory device capable of reducing read time
08/01/2006US7085168 Programming method for controlling memory threshold voltage distribution
08/01/2006US7085167 Methods for programming user data and confirmation information in nonvolatile memory devices
08/01/2006US7085166 Semiconductor memory device and programming method thereof
08/01/2006US7085164 Programming methods for multi-level flash EEPROMs
08/01/2006US7085163 Gate voltage regulation system for a non-volatile memory cells programming and/or soft programming phase
08/01/2006US7085162 Semiconductor memory device using only single-channel transistor to apply voltage to selected word line
08/01/2006US7085161 Non-volatile semiconductor memory with large erase blocks storing cycle counts
08/01/2006US7085160 NAND flash memory and blank page search method therefor
08/01/2006US7085159 Highly compact non-volatile memory and method therefor with internal serial buses
08/01/2006US7085158 Nonvolatile semiconductor memory device and one-time programming control method thereof
08/01/2006US7085157 Nonvolatile memory device and semiconductor device
08/01/2006US7085155 Secured phase-change devices
08/01/2006US7085154 Device and method for pulse width control in a phase change memory device
08/01/2006US7085153 Semiconductor memory cell, array, architecture and device, and method of operating same
08/01/2006US7083108 Redundantly encoded data structure for encoding a surface
08/01/2006CA2250504C Multibit single cell memory having tapered contact
07/2006
07/27/2006WO2006078531A2 Scheduling of housekeeping operations in flash memory systems
07/27/2006WO2006043225B1 Memory device and method providing an average threshold based refresh mechanism
07/27/2006US20060168236 Communication adapter device, communication adapter, method for write in nonvolatile memory, and electric apparatus used for the same, and rom writer
07/27/2006US20060166443 Multi-state NROM device
07/27/2006US20060164897 Semiconductor storage device having page copying function
07/27/2006US20060164895 Semiconductor storage device
07/27/2006US20060164891 Removable modules with external I/O flexibility via an integral second-level removable slot
07/27/2006US20060164890 Method of driving a program operation in a nonvolatile semiconductor memory device
07/27/2006US20060164889 Microcomputer and microprocessor having flash memory operable from single external power supply
07/27/2006US20060164888 Voltage down-converter with reduced ripple
07/27/2006US20060164887 Method and apparatus for changing operating conditions of nonvolatile memory
07/27/2006US20060164886 Nonvolatile semiconductor memory device having protection function for each memory block
07/27/2006US20060164885 [method for reducing data error when falsh memory storage device using copy back command]
07/27/2006US20060164884 Method of dynamically controlling program verify levels in multilevel memory cells
07/27/2006US20060164883 Multi-valued scrambling and descrambling of digital data on optical disks and other storage media
07/27/2006US20060163645 EEPROM With Split Gate Source Side Injection
07/27/2006US20060163642 Self-aligned 2-bit "double poly cmp" flash memory cell
07/27/2006US20060163614 Multi-layer memory arrays
07/27/2006DE102005001902A1 Sub-lithographic contact structure manufacture, for semiconductor device, involves etching resistance changing material in through holes and separating layer from electrically conducting material to form contact electrode
07/27/2006DE102005001667A1 Non-volatile memory cell for storing e.g. repair data, has control unit that activates selection unit so that data is stored in memory unit and deactivates selection unit so that resistive memory units are separated from memory unit
07/26/2006EP1684308A1 Methods for preventing fixed pattern programming
07/26/2006EP1684307A1 Method, circuit and systems for erasing one or more non-volatile memory cells
07/26/2006EP1684306A2 Phase change memory device and data writing method
07/26/2006EP1683200A1 Memory transistor and memory element with an asymmetrical pocket doping region
07/26/2006EP1683160A2 A method circuit and system for read error detection in a non-volatile memory array
07/26/2006EP1683159A2 Method, system and circuit for programming a non-volatile memory array
07/26/2006EP1683157A1 Phase change memory element with improved cyclability
07/26/2006CN1809895A Source controlled operation of non-volatile memories
07/26/2006CN1808718A Storage unit and operation methods for array of electric charge plunged layer
07/26/2006CN1808623A Write operation circuit and method applied in nonvolatile separate gate memory
07/26/2006CN1808622A Nonvolatile memory devices and programming methods using subsets of columns
07/25/2006US7082510 Storage device employing a flash memory
07/25/2006US7082490 Method and system for enhancing the endurance of memory cells
07/25/2006US7082077 Control method of semiconductor memory device and semiconductor memory device
07/25/2006US7082069 Memory array with fast bit line precharge
07/25/2006US7082062 Voltage output control apparatus and method
07/25/2006US7082061 Memory array with low power bit line precharge
07/25/2006US7082060 Soft programming for recovery of overerasure
07/25/2006US7082059 Position based erase verification levels in a flash memory device
07/25/2006US7082058 Non-volatile semiconductor memory device having sense amplifier with increased speed
07/25/2006US7082057 Semiconductor memory device
07/25/2006US7082056 Flash memory device and architecture with multi level cells
07/25/2006US7082055 Semiconductor integrated circuit device
07/25/2006US7082054 Semiconductor storage device having page copying function
07/25/2006US7082051 Method and driver for programming phase change memory cell
07/25/2006US7081776 Voltage detection circuit, semiconductor device, method for controlling voltage detection circuit
07/20/2006WO2006076145A1 Multi-level ono flash program algorithm for threshold width control
07/20/2006WO2006075202A1 Nonvolatile memory cell having current compensated for temperature dependency and data read method thereof
07/20/2006WO2006029228A3 Memory using mixed valence conductive oxides
07/20/2006WO2005059966A3 Rotational use of memory to minimize write cycles
07/20/2006US20060160305 Pillar Cell Flash Memory Technology
07/20/2006US20060158947 Reference sense amplifier for non-volatile memory
07/20/2006US20060158945 Readout circuit for semiconductor storage device
07/20/2006US20060158940 Partial erase verify
07/20/2006US20060158939 Method of erasing data in non-volatile semiconductor memory device while suppressing variation
07/20/2006US20060158937 Nonvolatile semiconductor memory device
07/20/2006US20060158936 Semiconductor memory device using only single-channel transistor to apply voltage to selected word line
07/20/2006US20060158935 Method for compensated sensing in non-volatile memory
07/20/2006US20060158934 Electronic memory device having high integration density non-volatile memory cells and a reduced capacitive coupling
07/20/2006US20060158933 NAND flash memory device having security redundancy block and method for repairing the same
07/20/2006US20060158932 Nonvolatile semiconductor memory device having reduced dependency of a source resistance on a position in an array
07/20/2006US20060158931 Electronic memory device having high density non-volatile memory cells and a reduced capacitive interference cell-to-cell
07/20/2006US20060158916 Programable identification circuitry
07/20/2006US20060158218 Electronic circuit with array of programmable logic cells
07/20/2006US20060157775 Byte-operational nonvolatile semiconductor memory device
07/20/2006US20060157772 Nonvolatile memory device
07/20/2006US20060157681 Horizontal chalcogenide element defined by a pad for use in solid-state memories
07/20/2006DE102006001420A1 Side buffer for non-volatile semiconductor memory element, has main buffer memory block provided to store main buffer data and in accordance with these data, to drive on bit line
07/20/2006DE102005020808B3 Memory cell programming and deletion controlling method for non-volatile memory device, involves producing positive or negative acknowledge information after process of programming or deletion of memory cell based on content of control cell
07/20/2006DE102004052647A1 Methode zur Verbesserung der thermischen Eigenschaften von Halbleiter-Speicherzellen Method for improving the thermal characteristics of semiconductor memory cells
07/19/2006EP1681680A2 Dynamic column block selection
07/19/2006EP1680787A2 Nrom flash memory with self-aligned structural charge separation
07/19/2006EP1680744A2 Method and system for enhancing the endurance of memory cells
07/19/2006EP1435099A4 Flash management system using only sequential write
07/19/2006CN1806295A Memory with uniform read and verification threshold
07/19/2006CN1805051A 半导体存储器件 A semiconductor memory device
07/19/2006CN1805050A Semiconductor memory device using only single-channel transistor to apply voltage to selected word line
07/19/2006CN1805049A Method of data access in nonvolatile storage in embedded system
07/19/2006CN1265460C Memory device and method for driving the memory device
07/19/2006CN1265395C Flash memory and program planning thereof and method for repetitive recording
07/19/2006CN1265267C Transmission channel and its control method
07/18/2006US7080270 Multi-threshold-voltage integrated circuit having a non-volatile data storage circuit