Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002)
10/1984
10/10/1984EP0121364A2 Automatic read system for peripheral-controller
10/10/1984EP0121030A1 Arbitration device for the allocation of a common resource to a selected unit of a data processing system
10/10/1984EP0120914A1 Multiprocessor computing system featuring shared global control.
10/10/1984EP0120913A1 Deadlock detection and resolution scheme
10/10/1984EP0120889A1 Direct memory access peripheral unit controller.
10/09/1984US4476543 Connection of a number of work stations to a single conductor coaxial bus
10/09/1984US4476527 Synchronous data bus with automatically variable data rate
10/09/1984US4476524 Page storage control methods and means
10/09/1984US4476522 Programmable peripheral processing controller with mode-selectable address register sequencing
10/09/1984CA1175926A1 Word processing system employing a plurality of general purpose processor circuits
10/03/1984EP0120172A1 Bus interface device for a data processing system
10/03/1984EP0036864B1 Data communications controller
10/02/1984US4475155 I/O Adapter with direct memory access to I/O control information
09/1984
09/27/1984WO1984003783A1 System for connecting and controlling external devices
09/25/1984US4473880 Arbitration means for controlling access to a bus shared by a number of modules
09/25/1984US4473879 Data transfer system in which time for transfer of data to a memory is matched to time required to store data in memory
09/25/1984CA1175156A1 Cache memory using a lowest priority replacement circuit
09/19/1984EP0118731A1 Distributed-structure circuit for arbitrating the access requests to the bus of a multiprocessor system
09/19/1984EP0118670A2 Priority system for channel subsystem
09/19/1984EP0118669A2 Channel subsystem
09/18/1984US4472787 System for transferring words on a bus with capability to intermix first attempts and retrys
09/18/1984US4472771 Device wherein a central sub-system of a data processing system is divided into several independent sub-units
09/18/1984US4472712 Multipoint data communication system with local arbitration
09/12/1984EP0118037A2 Computer network system and its use for information unit transmission
09/12/1984EP0117954A2 Bus networks for digital data processing systems and modules usable therewith
09/12/1984EP0117930A1 Interactive work station with auxiliary microprocessor for storage protection
09/11/1984US4471481 Autonomous terminal data communications system
09/11/1984US4471458 Computer interface
09/11/1984US4471457 Supervisory control of peripheral subsystems
09/11/1984US4471456 Multifunction network
09/11/1984US4471427 Direct memory access logic system for a data transfer network
09/11/1984US4471425 A data transfer control system for multiple units on a common bus using a serially transmitted transfer permission signal
09/11/1984US4471385 Electro-optical illumination control system
09/11/1984CA1174374A1 Memory management unit for developing multiple physical addresses in parallel for use in a cache
09/11/1984CA1174373A1 Channel adapter for virtual storage system
09/11/1984CA1174371A1 Input/output multiplexer data distributor
09/11/1984CA1174369A1 Programmable controller for executing block transfer with remote i/o interface racks
09/05/1984EP0117837A2 User programmable bus configuration for microcomputers
09/05/1984EP0117836A2 Address-controlled automatic bus arbitration and address modification
09/05/1984EP0117682A2 Peripherally synchronized data transfer system
09/05/1984EP0117442A2 Distributed bus control system
09/05/1984EP0117432A1 Enhanced reliability interrupt control apparatus
09/05/1984EP0117408A2 Method and mechanism for load balancing in a multiunit system
09/04/1984US4470128 Control arrangement for magnetic bubble memories
09/04/1984US4470114 High speed interconnection network for a cluster of processors
09/04/1984US4470113 Information processing unit
09/04/1984US4470112 Circuitry for allocating access to a demand-shared bus
09/04/1984US4470111 Priority interrupt controller
09/04/1984US4470110 System for distributed priority arbitration among several processing units competing for access to a common data channel
09/04/1984CA1173973A1 Emulation of data processing display terminals of variable screen size on the display of a text processor
09/04/1984CA1173972A1 Data processing system bus for multiple independent users
09/04/1984CA1173929A1 Bus system
09/04/1984CA1173928A1 Channel interface circuit
08/1984
08/30/1984WO1984003376A1 Microcomputer interface arrangement
08/30/1984WO1984003374A1 Peripherally synchronized data transfer system
08/29/1984EP0116863A1 Interface for controlling the bidirectional data transfer between an asynchronous bus and a synchronous bus
08/29/1984EP0116710A2 Impedance restoration for fast carry propagation
08/29/1984EP0116694A2 Method for dynamically reconfiguring a data processing system for added devices
08/28/1984US4468753 Input/output buffer circuitry
08/28/1984US4468750 Clustered terminals with writable microcode memories & removable media for applications code & transactions data
08/28/1984US4468738 Bus access arbitration using unitary arithmetic resolution logic and unique logical addresses of competing processors
08/28/1984US4468737 Circuit for extending a multiplexed address and data bus to distant peripheral devices
08/28/1984US4468733 Multi-computer system with plural serial bus loops
08/28/1984US4468730 Detection of sequential data stream for improvements in cache data storage
08/28/1984CA1173565A1 Apparatus and method for selective cache clearing in a data processing system
08/28/1984CA1173564A1 Multiple mode central processing unit
08/28/1984CA1173518A1 Protection circuit for a data driver
08/22/1984EP0116098A1 Peripheral controller for i/o subsystem using slow devices
08/21/1984US4467454 High-speed external memory system
08/21/1984US4467447 Information transferring apparatus
08/21/1984US4467445 Communication adapter circuit
08/21/1984US4467420 One-chip microcomputer
08/21/1984US4467419 Data processing system with access to a buffer store during data block transfers
08/21/1984US4467418 Data transmission system resolving access conflicts between transmitters-receivers to a common bus
08/21/1984US4467413 Microprocessor apparatus for data exchange
08/21/1984US4467411 Machine-implemented method of operating a storage subsystem
08/21/1984CA1173169A1 Input/output multiplexer for a data processing system
08/21/1984CA1173143A1 Transfer bus matrix
08/16/1984WO1984003192A1 Data network interface
08/15/1984EP0115566A2 Method for testing the operation of an I/O controller in a data processing system
08/14/1984US4466058 Method and apparatus for establishing priority between processing units having a common communication channel
08/14/1984US4466055 Information processing system including a one-chip arithmetic control unit
08/14/1984US4466000 Data communication system
08/14/1984CA1172771A1 Memory controller with interleaved queuing apparatus
08/14/1984CA1172769A1 Device for time-dividing the access to a memory between a main computer and some peripheral computers
08/14/1984CA1172719A1 Distributed-structure message switching system on random-access channel for message dialogue among processing units
08/08/1984EP0115454A2 Bus for data processing system with fault cycle operation
08/08/1984EP0115344A2 Buffer control system
08/08/1984EP0115179A2 Virtual memory address translation mechanism with combined hash address table and inverted page table
08/08/1984EP0114928A1 Bus arbitration system for a data processing system
08/07/1984US4464772 Frequency synthesizer for providing a pseudo-constant frequency signal
08/07/1984US4464749 Bi-directional token flow system
08/07/1984US4464733 Office system comprising terminals, a data processor and auxiliary apparatus and a switching device for mass data transport between the auxiliary apparatus
08/07/1984US4464715 Memory accessing method
08/07/1984CA1172383A1 Data communications system with receiving terminal for varying the portions of received data being displayed
08/07/1984CA1172382A1 Multi sub-channel adapter with single status/address register
08/07/1984CA1172381A1 Process and device for selectively assigning the resources of a control unit to a selected user among a plurality of potential users
08/07/1984CA1172379A1 Peripheral system having a data buffer for a plurality of peripheral devices, plural connections to each device and a priority of operations
08/07/1984CA1172378A1 Scheduling device operations in a buffered peripheral subsystem
08/07/1984CA1172376A1 Interrupt coupling and monitoring system
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