| Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002) |
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| 03/15/1983 | US4376972 Sequential word aligned address apparatus |
| 03/15/1983 | CA1143070A1 Binary output processing in a digital computer using a time-sorted stack |
| 03/15/1983 | CA1143028A1 Industrial communications network |
| 03/09/1983 | EP0073738A1 Device for the automatic control of a machine |
| 03/09/1983 | EP0073710A2 Data communications network |
| 03/09/1983 | EP0073698A2 System and method for synchronizing variable-length messages in a local area network data communication system |
| 03/01/1983 | US4375691 Method and device for frequency translation |
| 03/01/1983 | US4375665 Eight bit standard connector bus for sixteen bit microcomputer using mirrored memory boards |
| 03/01/1983 | US4375639 Synchronous bus arbiter |
| 02/23/1983 | EP0072614A2 Buffered handshake bus |
| 02/23/1983 | EP0072613A2 Bid control circuit for time-shared bus |
| 02/22/1983 | US4375084 Digital input apparatus |
| 02/22/1983 | CA1141866A1 Data processing system having synchronous bus wait/retry cycle |
| 02/16/1983 | EP0072179A2 Clearing invalid addresses in cache memory |
| 02/16/1983 | EP0072107A2 Peripheral sub-systems accommodating guest operating systems |
| 02/16/1983 | EP0071782A2 Multi subchannel adapter with a single status/address register |
| 02/16/1983 | EP0071747A1 Self-pacing serial keyboard interface for data processing system |
| 02/16/1983 | EP0035546A4 Peripheral unit controller. |
| 02/15/1983 | US4374429 Information transfer system wherein bidirectional transfer is effected utilizing unidirectional bus in conjunction with key depression signal line |
| 02/15/1983 | US4374418 Linear microsequencer unit cooperating with microprocessor system having dual modes |
| 02/15/1983 | US4374416 Linear sequencing microprocessor having word and byte handling |
| 02/15/1983 | US4374415 Host control of suspension and resumption of channel program execution |
| 02/15/1983 | US4374414 Arbitration controller providing for access of a common resource by a duplex plurality of central processing units |
| 02/15/1983 | US4374413 Arbitration controller providing for access of a common resource by a plurality of central processing units |
| 02/15/1983 | US4374410 Data processing system |
| 02/15/1983 | CA1141476A1 Buffering data signals |
| 02/09/1983 | EP0071296A1 Office system comprising terminals, a data processor and peripheral apparatuses and a switching device for mass data transport between the peripheral apparatuses and a switching device for use in such an office system |
| 02/09/1983 | EP0071030A2 Method for establishing variable path group associations and affiliations between "non-static" MP systems and shared devices |
| 02/08/1983 | US4373183 Bus interface units sharing a common bus using distributed control for allocation of the bus |
| 02/08/1983 | US4373181 Dynamic device address assignment mechanism for a data processing system |
| 02/08/1983 | CA1141037A1 Binary input/output processing in a digital computer |
| 02/03/1983 | WO1983000413A1 Apparatus for interconnecting data communication equipment and data terminal equipment |
| 02/01/1983 | US4371932 I/O Controller for transferring data between a host processor and multiple I/O units |
| 02/01/1983 | US4371931 Linear micro-sequencer for micro-processor system utilizing specialized instruction format |
| 02/01/1983 | US4371929 Multiprocessor system with high density memory set architecture including partitionable cache store interface to shared disk drive memory |
| 02/01/1983 | US4371928 Interface for controlling information transfers between main data processing systems units and a central subsystem |
| 02/01/1983 | US4371926 Input/output information indication system |
| 02/01/1983 | US4371925 Data processing system having unique bus control operation |
| 02/01/1983 | US4371924 Computer system apparatus for prefetching data requested by a peripheral device from memory |
| 01/31/1983 | EP0022814A4 Memory system for a data processing system. |
| 01/25/1983 | US4370744 Time division multiplex communication system |
| 01/25/1983 | US4370712 Memory controller with address independent burst mode capability |
| 01/25/1983 | US4370708 Logic system for selectively reconfiguring an intersystem communication link |
| 01/25/1983 | CA1140231A1 Bus collision avoidance system for distributed network data processing communications system |
| 01/25/1983 | CA1140230A1 Method for carrying out loopback test |
| 01/20/1983 | WO1983000241A1 Address generating apparatus and method |
| 01/20/1983 | WO1983000240A1 Extended address generating apparatus and method |
| 01/20/1983 | WO1983000239A1 Computer with expanded addressing capability |
| 01/19/1983 | EP0069886A1 Priority selection device |
| 01/19/1983 | EP0069862A2 Page storage control methods and means |
| 01/19/1983 | EP0069829A2 Bus system |
| 01/18/1983 | CA1139891A1 Memory system for programmable controller |
| 01/18/1983 | CA1139868A1 High speed data switching node |
| 01/12/1983 | EP0069570A2 Memory for multi-word data bus |
| 01/12/1983 | EP0069438A2 A multiprocessor system, a system and method for intercommunicating between processors, a system for effecting data transfer, a system for controlling routing of messages, and an arrangement for ascertaining a global state of readiness of a system |
| 01/12/1983 | EP0069382A1 Loop type data highway system |
| 01/11/1983 | US4368514 Multi-processor system |
| 01/11/1983 | US4368513 Partial roll mode transfer for cyclic bulk memory |
| 01/11/1983 | US4368512 Advanced data link controller having a plurality of multi-bit status registers |
| 01/05/1983 | EP0068993A2 Computer interface |
| 01/05/1983 | EP0068992A2 Linked data systems |
| 01/05/1983 | EP0068991A2 Data buffer |
| 01/05/1983 | EP0068831A2 Address setting for computer terminal unit |
| 01/05/1983 | EP0068569A2 Digital data apparatus with memory identification |
| 01/05/1983 | EP0068093A2 Data communication system with capabilities to analyse an error or problem condition |
| 12/29/1982 | EP0067982A2 Microprocessor configuration, preferably for the application in multimicroprocessor systems |
| 12/29/1982 | EP0067957A1 Method for dynamically altering a send queue of documents in a data communication system |
| 12/28/1982 | US4366539 Memory controller with burst mode capability |
| 12/28/1982 | US4366538 Memory controller with queue control apparatus |
| 12/28/1982 | US4366480 Demand driven access mechanism |
| 12/28/1982 | US4366479 Control information communication method and system through a common signal transmission line |
| 12/28/1982 | US4366478 Signal transmitting and receiving apparatus |
| 12/28/1982 | CA1138553A1 Distributed multi-port communications system |
| 12/22/1982 | EP0067657A2 Computer system |
| 12/22/1982 | EP0067556A2 Digital data processing system |
| 12/22/1982 | EP0067519A1 Telecommunications system |
| 12/22/1982 | EP0067302A2 Display updating device in a data communication system |
| 12/22/1982 | EP0067294A2 Data processing apparatus with master/slave control |
| 12/22/1982 | EP0067288A2 Data communications system comprising at least one data transmitting terminal and at least one data receiving display terminal |
| 12/22/1982 | EP0067283A1 Communication adapter circuit |
| 12/22/1982 | EP0067267A1 Document handling terminal computer system and method of operation thereof |
| 12/21/1982 | US4365296 System for controlling the duration of the time interval between blocks of data in a computer-to-computer communication system |
| 12/21/1982 | US4365295 Multiprocessor system |
| 12/21/1982 | US4365294 Modular terminal system using a common bus |
| 12/21/1982 | US4365293 Serial communications bus for remote terminals |
| 12/21/1982 | US4365292 Array processor architecture connection network |
| 12/21/1982 | US4365291 System for bidirectional transmission of interlocked signals |
| 12/21/1982 | CA1138121A1 Hardware for extending microprocessor addressing capability |
| 12/21/1982 | CA1138119A1 Shared memory computer method and apparatus |
| 12/21/1982 | CA1138117A1 I/o request interrupt mechanism |
| 12/15/1982 | EP0066766A2 I/O controller with a dynamically adjustable cache memory |
| 12/14/1982 | CA1137644A1 Allocating and resolving next virtual pages for input/output |
| 12/14/1982 | CA1137585A1 Function coding via digital addresses in a two-way system |
| 12/14/1982 | CA1137584A1 Multiprocessor system for the processing of digital data |
| 12/14/1982 | CA1137583A1 Intersystem communication link |
| 12/07/1982 | US4363096 Arbitration controller providing for access of a common resource by a duplex plurality of central processing units |
| 12/07/1982 | US4363094 Communications processor |
| 12/07/1982 | US4363093 Processor intercommunication system |
| 11/30/1982 | US4361876 Microcomputer with logic for selectively disabling serial communications |
| 11/30/1982 | US4361869 Multimode memory system using a multiword common bus for double word and single word transfer |