Patents
Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002)
12/1983
12/07/1983EP0013739B1 Communication controller in a data processing system
12/06/1983US4419762 Asynchronous status register
12/06/1983US4419728 Channel interface circuit providing virtual channel number translation and direct memory access
12/06/1983US4419724 Main bus interface package
12/06/1983CA1158363A1 Multiprocessor system
11/1983
11/30/1983EP0095363A2 Direct memory access data transfer system for use with plural processors
11/30/1983EP0095337A2 Emergency access method in centralized monitoring system
11/29/1983US4418386 Communication bus for a multi-source/receiver data processing system
11/29/1983US4418384 Communication subsystem with an automatic abort transmission upon transmit underrun
11/29/1983US4418382 Information exchange processor
11/29/1983CA1157952A1 Chip topography for integrated circuit communication controller
11/23/1983EP0094746A2 High-speed data transfer unit for digital data processing system
11/23/1983EP0094728A1 Computer system comprising a data, address and control signal bus which comprises a left bus and a right bus
11/22/1983US4417320 Interface for data communication systems using serial biphase data transmissions
11/22/1983US4417304 Synchronous cycle steal mechanism for transferring data between a processor storage unit and a separate data handling unit
11/22/1983US4417303 Multi-processor data communication bus structure
11/22/1983US4417302 Bypass for prioritizing interrupts among microprocessors
11/22/1983CA1157544A1 Distributed status reporting system
11/16/1983EP0094180A2 Dual-count, round-robin distributed arbitration technique for serial buses
11/16/1983EP0094179A2 Computer interconnection part
11/16/1983EP0094178A2 Interface for serial data communications link
11/16/1983EP0094140A1 Data processing system with system bus for transfer of information
11/16/1983EP0094042A2 Data processing apparatus wherein a system bus is shared by two or more circuits
11/15/1983US4415994 Random access memory arrangements
11/15/1983US4415986 Data flow control system
11/15/1983CA1157163A1 Communication control equipment
11/15/1983CA1157162A1 Modular terminal system
11/15/1983CA1157121A1 Effective error control scheme for satellite communications
11/10/1983WO1983003911A1 Read control operations system for a multiple line adapter organization
11/10/1983WO1983003910A1 Method and apparatus for limiting bus utilization
11/09/1983EP0093578A2 Communications system
11/09/1983EP0093239A2 Lookahead I/O device control subsystem
11/08/1983US4414664 Wait circuitry for interfacing between field maintenance processor and device specific adaptor circuit
11/08/1983US4414626 Input/output control system and methods
11/08/1983US4414624 Multiple-microcomputer processing
11/08/1983US4414620 Inter-subsystem communication system
11/08/1983CA1156767A1 Block transfers of information in data processing networks
11/02/1983EP0092976A2 Memory writing control apparatus
11/02/1983EP0092836A2 Read control operations system for a multiple line adapter organization
11/02/1983EP0092719A1 Arrangement for the coupling of digital processing units
11/01/1983US4413319 Programmable controller for executing block transfer with remote I/O interface racks
11/01/1983US4413317 Multiprocessor system with cache/disk subsystem with status routing for plural disk drives
10/1983
10/25/1983US4412286 Tightly coupled multiple instruction multiple data computer system
10/25/1983US4412285 Multiprocessor intercommunication system and method
10/25/1983US4412283 High performance microprocessor system
10/25/1983US4412282 Microprocessor control circuit
10/25/1983US4412281 Distributed signal processing system
10/25/1983CA1155964A1 Control apparatus for virtual address translation unit
10/25/1983CA1155961A1 Cluster of data-entry terminals
10/19/1983EP0091657A1 Data transmission apparatus between two asynchronously controlled data processing systems with a buffer memory
10/19/1983EP0091592A1 Priority control circuit for a digital computer
10/19/1983EP0091488A1 Bus system.
10/18/1983US4410961 Interface between a processor system and peripheral devices used in a mailing system
10/18/1983US4410944 Apparatus and method for maintaining cache memory integrity in a shared memory environment
10/18/1983US4410943 Memory delay start apparatus for a queued memory controller
10/18/1983US4410942 Synchronizing buffered peripheral subsystems to host operations
10/18/1983US4410889 System and method for synchronizing variable-length messages in a local area network data communication system
10/13/1983WO1983003507A1 Data communication network and method of communication
10/13/1983WO1983003486A1 Component selection system for a multiple line adapter organization
10/12/1983EP0091271A2 Data transmission apparatus
10/12/1983EP0091195A2 Universal interface unit
10/12/1983EP0028631B1 First-come first-served resource allocation apparatus
10/11/1983US4409656 Serial data bus communication system
10/11/1983US4409652 Apparatus for processing digital signals
10/05/1983EP0090408A2 Component selection system for a multiple line adapter organization
10/05/1983EP0090180A1 Ink metering device
10/05/1983EP0090016A1 Apparatus for routing data amoung low order units and a high order host computer system
10/04/1983US4408333 Data acquisition circuit
10/04/1983US4408300 Single transmission bus data network employing an expandable daisy-chained bus assignment control line
10/04/1983US4408274 Memory protection system using capability registers
10/04/1983US4408272 Data control circuit
10/04/1983CA1154887A1 Asynchronous multiplex system
09/1983
09/29/1983WO1983003316A1 Memory selection in a multiple line adapter organization
09/28/1983EP0089440A1 Method and device for the exchange of information between terminals and a central control unit
09/27/1983US4407016 Microprocessor providing an interface between a peripheral subsystem and an object-oriented data processor
09/27/1983US4407014 Communications subsystem having a direct connect clock
09/21/1983EP0089234A2 Memory selection in a multiple line adapter organization
09/21/1983EP0089087A1 Communication system comprising a central data processing device, access stations and external stations, and incorporating a cryptographic check against falsification of an external station, and external stations for use in such a communication system
09/21/1983EP0088982A1 Microcomputer system with buffer in peripheral storage control
09/21/1983EP0088839A1 Input/output multiplexer
09/21/1983EP0088838A1 Input/output multiplexer
09/21/1983EP0088789A1 Multiprocessor computer system.
09/20/1983US4405981 Communication multiplexer having an apparatus for establishing a single line priority
09/20/1983US4405979 Data processing system having apparatus in a communications subsystem for establishing byte synchronization
09/20/1983US4405978 Microprocessor based computer terminal
09/20/1983US4405898 Pseudo synchronous clocking
09/20/1983CA1154169A1 Data processing system requiring the generation of microinstructions
09/15/1983WO1983003178A1 Improved multipoint data communication system with local arbitration
09/14/1983EP0088618A2 Byte-oriented line adapter system
09/14/1983EP0088617A2 Bit-oriented line adapter system
09/13/1983US4404650 Method and circuit arrangement for transmitting binary signals between peripheral units which are connected to one another via a central bus line system
09/13/1983US4404628 Multiprocessor system
09/13/1983US4404627 Interrupt signal generating means for data processor
09/06/1983US4403308 Apparatus for and method of refreshing MOS memory
09/06/1983US4403288 Methods and apparatus for resetting peripheral devices addressable as a plurality of logical devices
09/06/1983US4403286 Balancing data-processing work loads
09/06/1983US4403282 Data processing system using a high speed data channel for providing direct memory access for block data transfers
09/06/1983US4403192 Priority circuit for service request signals
09/06/1983US4403111 Apparatus for interconnecting data communication equipment and data terminal equipment
09/06/1983CA1153475A1 Distributed data transfer control for parallel processor architectures