| Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002) |
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| 09/06/1983 | CA1153473A1 Dynamic rank ordered scheduling mechanism |
| 09/01/1983 | WO1983003017A1 Computer with automatic mapping of memory contents into machine registers |
| 08/31/1983 | EP0087368A2 Interchangeable interface circuit structure |
| 08/31/1983 | EP0087367A2 Interchangeable interface circuitry arrangements for use with a data processing system |
| 08/31/1983 | EP0087266A2 Priority resolver circuit |
| 08/30/1983 | US4402041 Plural storage areas with different priorities in a processor system separated by processor controlled logic |
| 08/30/1983 | US4402040 Distributed bus arbitration method and apparatus |
| 08/30/1983 | CA1153123A1 Integrated floating point processor and central microprocessor |
| 08/30/1983 | CA1153079A1 Data processing system having multiple common buses |
| 08/24/1983 | EP0086601A2 Multiprocessor system having mutual exclusion control function |
| 08/24/1983 | EP0086307A2 Microcomputer system for digital signal processing |
| 08/23/1983 | US4400794 Memory mapping unit |
| 08/23/1983 | US4400778 Large-volume, high-speed data processor |
| 08/23/1983 | US4400773 Independent handling of I/O interrupt requests and associated status information transfers |
| 08/23/1983 | US4400772 Method and apparatus for direct memory access in a data processing system |
| 08/23/1983 | US4400771 Multi-processor system with programmable memory-access priority control |
| 08/23/1983 | CA1152652A1 Data processing system with input-output interface unit |
| 08/18/1983 | WO1983002833A1 Digital input device |
| 08/17/1983 | EP0085943A1 Method for the access control of subscriber stations from a data transmission apparatus to bus lines |
| 08/16/1983 | US4399504 Method and means for the sharing of data resources in a multiprocessing, multiprogramming environment |
| 08/16/1983 | CA1152221A1 Peripheral unit controller |
| 08/10/1983 | EP0085322A2 Method of controlling distributed data processing operations in a data processing system |
| 08/09/1983 | US4398299 Data set network diagnostic system |
| 08/09/1983 | US4398298 Communication system having stations capable of detecting another station's |
| 08/09/1983 | US4398246 Word processing system employing a plurality of general purpose processor circuits |
| 08/04/1983 | WO1983002675A1 Text comparator |
| 08/04/1983 | WO1983002674A1 Digital system including line activity detection |
| 08/02/1983 | US4396995 Adapter for interfacing between two buses |
| 08/02/1983 | US4396984 Peripheral systems employing multipathing, path and access grouping |
| 08/02/1983 | US4396983 Distributed data processing system having several local system and communication modules for use in such data processing system |
| 08/02/1983 | US4396979 Microprocessor with improved arithmetic logic unit data path |
| 08/02/1983 | US4396978 Multiprocessor system with switchable address space |
| 08/02/1983 | CA1151250A1 Apparatus for providing evenly delayed digital signals |
| 07/27/1983 | EP0084431A2 Monitoring computer systems |
| 07/26/1983 | US4395756 Processor implemented communications interface having external clock actuated disabling control |
| 07/26/1983 | US4395753 Allocation controller providing for access of multiple common resources by a plurality of central processing units |
| 07/26/1983 | US4395710 Bus access circuit for high speed digital data communication |
| 07/26/1983 | CA1150865A1 Time division multiplex communication systems |
| 07/26/1983 | CA1150847A1 Broadband high level data link communication line adapter |
| 07/26/1983 | CA1150793A1 Bus transmission system |
| 07/19/1983 | US4394736 Data processing system utilizing a unique two-level microcoding technique for forming microinstructions |
| 07/19/1983 | US4394734 Programmable peripheral processing controller |
| 07/19/1983 | US4394728 Allocation controller providing for access of multiple common resources by a duplex plurality of central processing units |
| 07/19/1983 | US4394726 Distributed multiport memory architecture |
| 07/12/1983 | US4393470 Method and device for the counting and management of asynchronous events emitted by peripheral devices in a data processing system |
| 07/12/1983 | US4393464 Chip topography for integrated circuit communication controller |
| 07/12/1983 | US4393461 Communications subsystem having a self-latching data monitor and storage device |
| 07/12/1983 | US4393459 Status reporting with ancillary data |
| 07/12/1983 | US4393381 Transfer bus matrix |
| 07/06/1983 | EP0083283A2 Method for the exchange of data between processing modules and a central memory in a data processing system |
| 07/06/1983 | EP0083002A2 Interrupt system for peripheral controller |
| 07/06/1983 | EP0082980A1 Signal transfer arrangement using a bus as a storage device |
| 07/06/1983 | EP0082903A1 Control unit connectable to a pair of memories having different speeds |
| 07/06/1983 | EP0082889A1 Method and arrangement for local address acquisition by a station in a communication system |
| 07/05/1983 | US4392200 Cached multiprocessor system with pipeline timing |
| 07/04/1983 | EP0029855A4 Microcomputer with mpu-programmable eprom. |
| 06/29/1983 | EP0082765A1 Management device for a common memory with several processors |
| 06/29/1983 | EP0082722A2 Computer system with auxiliary service computer |
| 06/29/1983 | EP0082683A2 Computer memory system |
| 06/29/1983 | EP0082511A1 Data processing system with a common main memory and several processors connected in series |
| 06/28/1983 | US4390969 Asynchronous data transmission system with state variable memory and handshaking protocol circuits |
| 06/28/1983 | US4390967 Interface system wherein the interface is addressed before data transfer from a selected device |
| 06/28/1983 | US4390964 Input/output subsystem using card reader-peripheral controller |
| 06/28/1983 | US4390947 Serial line communication system |
| 06/28/1983 | US4390944 System for controlling access to a common bus in a computer system |
| 06/28/1983 | US4390943 Interface apparatus for data transfer through an input/output multiplexer from plural CPU subsystems to peripheral subsystems |
| 06/28/1983 | US4390797 Semiconductor circuit |
| 06/28/1983 | CA1149075A2 Data processing apparatus |
| 06/28/1983 | CA1149070A1 Synchronous cycle steal mechanism for transferring data between a processor storage unit and a separate data handling unit |
| 06/28/1983 | CA1149069A1 Interrupt expander circuit |
| 06/28/1983 | CA1149040A1 Arbitration controller providing for access of a common resource by a plurality of central processing units |
| 06/23/1983 | WO1983002182A1 An arbiter switch for a concurrent network of processors |
| 06/23/1983 | WO1983002181A1 A selector switch for a concurrent network of processors |
| 06/23/1983 | WO1983002180A1 Interface processor unit |
| 06/23/1983 | WO1983002178A1 Interrupt system for peripheral controller |
| 06/22/1983 | EP0081961A2 Synchronous data bus system with automatically variable data rate |
| 06/22/1983 | EP0081873A1 Data processing system allowing use of the same erasable and programmable memory for both reading and writing instructions and data |
| 06/22/1983 | EP0081820A2 An arbiter switch for a concurrent network of processors |
| 06/22/1983 | EP0081819A2 A selector switch for a concurrent network of processors |
| 06/21/1983 | CA1148665A1 Microcomputer arranged for direct memory access |
| 06/15/1983 | EP0081071A2 Rapid instructions redirection of satellite monitoring devices |
| 06/14/1983 | US4388725 Bus transmission system |
| 06/14/1983 | US4388686 Communication system for distributed control arrangement |
| 06/14/1983 | US4388683 Data transmission/receiving device having parallel/serial and serial parallel character conversion, particularly for data exchange between communicating data processing systems |
| 06/14/1983 | CA1148266A1 Data interface mechanism for interfacing bit-parallel data buses of different bit width |
| 06/14/1983 | CA1148265A1 High performance i/o controller for transferring data between a host processor and multiple i/o units |
| 06/09/1983 | WO1983002021A1 Interface circuit for subsystem controller |
| 06/09/1983 | WO1983002020A1 Direct memory access for a data transfer network |
| 06/08/1983 | EP0080891A2 Direct memory access logic system for a data transfer network |
| 06/08/1983 | EP0080890A2 Interface circuit for subsystem controller |
| 06/08/1983 | EP0080876A2 Cache control method and apparatus |
| 06/08/1983 | EP0080823A2 Memory mapping unit |
| 06/07/1983 | US4387446 Stack control system |
| 06/07/1983 | US4387441 Data processing system wherein at least one subsystem has a local memory and a mailbox memory within the local memory for storing header information |
| 06/07/1983 | US4387425 Masterless and contentionless computer network |
| 06/07/1983 | US4387424 Communications systems for a word processing system employing distributed processing circuitry |
| 06/07/1983 | CA1147865A1 Message interchange system among microprocessors connected by a synchronous transmitting means |
| 06/01/1983 | EP0080369A2 Peripheral unit adapted to monitor a low data rate serial input/output interface |
| 06/01/1983 | EP0080244A2 Method of identifying a system - allied, physically separableprogramme memory, and a data processing system using this method. |
| 05/31/1983 | US4386399 Data processing system |