| Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539) |
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| 07/16/1991 | CA1286422C Segment descriptor unit |
| 07/16/1991 | CA1286412C Apparatus and method for providing distributed control in a main memory unit of a data processing system |
| 07/16/1991 | CA1286405C Id system and method of writing data in an id system |
| 07/12/1991 | WO1991010956A1 Centralized reference and change table for a multiprocessor virtual memory system |
| 07/11/1991 | WO1991010204A1 Image processing apparatus having disk storage resembling ram memory |
| 07/11/1991 | WO1991010195A1 High speed active bus |
| 07/10/1991 | EP0436305A2 System and method for efficiently supporting access to I/O devices through large direct-mapped data caches |
| 07/10/1991 | EP0436123A2 Interrupt generating for single-bit memory errors |
| 07/10/1991 | EP0435959A1 Hardware implemented cache coherency protocole with duplicated distributed directories for high-performance multiprocessors |
| 07/09/1991 | US5031146 Memory apparatus for multiple processor systems |
| 07/09/1991 | US5031141 Apparatus for generating self-timing for on-chip cache |
| 07/09/1991 | US5031139 Random address system for circuit modules |
| 07/06/1991 | WO1991010192A1 Method and apparatus for controlling writing to memory |
| 07/06/1991 | CA2070986A1 Method and apparatus for controlling writing to memory |
| 07/03/1991 | EP0435805A2 Method of forming a search criteria and saving a search result |
| 07/03/1991 | EP0435804A2 A method of expanding user access to a library of shared electronic documents |
| 07/03/1991 | EP0435476A2 Database system |
| 07/03/1991 | EP0435475A2 High-performance frame buffer and cache memory system |
| 07/03/1991 | EP0435252A2 Memory access methods and apparatus |
| 07/03/1991 | EP0434901A2 A memory module utilizing partially defective memory chips |
| 07/03/1991 | EP0205523B1 Devices for the simultaneous activation of trains of commands and applications to memories |
| 07/02/1991 | US5029134 Memory circuit with improved serial access circuit arrangement |
| 07/02/1991 | US5029126 Cache memory |
| 07/02/1991 | US5029125 Method of reading and writing files on nonerasable storage media |
| 07/02/1991 | US5029078 Program loading method with relocation address |
| 07/02/1991 | US5029072 Lock warning mechanism for a cache |
| 07/02/1991 | US5029070 Coherent cache structures and methods |
| 07/02/1991 | CA1285656C Hierarchical file system to provide cataloging and retrieval of data |
| 06/30/1991 | WO1991010194A1 Cluster architecture for a highly parallel scalar/vector multiprocessor system |
| 06/30/1991 | CA2071481A1 Cluster architecture for a highly parallel scalar/vector multiprocessor system |
| 06/27/1991 | WO1991010191A1 Object oriented distributed processing system |
| 06/27/1991 | WO1991009403A2 Dual port, dual speed image memory access arrangement |
| 06/27/1991 | WO1991009367A1 Improvements in computer systems |
| 06/27/1991 | DE4039891A1 Data processing system cache memory control - transfers data held in cable memory to disc memory only upon detection of correct data location |
| 06/27/1991 | DE3942690A1 Modular automisation or programme control system - allows connection of peripheral to function unit only when correct symbolic address is received |
| 06/27/1991 | CA2047737A1 Object oriented distributed processing system |
| 06/26/1991 | EP0434589A2 Fault tolerant memory |
| 06/26/1991 | EP0434587A2 Method of installing tables in a document interchange system |
| 06/26/1991 | EP0434586A2 Attribute-based method and apparatus of classification and retrieval |
| 06/26/1991 | EP0434532A1 Secure fast data write method for mass-storage device and computer system executing this method |
| 06/26/1991 | EP0434250A2 Apparatus and method for reducing interference in two-level cache memories |
| 06/26/1991 | EP0434017A2 Arrangement for translating logical page addresses to corresponding real ones in data processing system |
| 06/26/1991 | EP0433882A2 Accelerated deadlock detection in congested data transactions |
| 06/26/1991 | EP0433831A2 A method for organizing a memory for fault tolerance |
| 06/26/1991 | EP0433818A2 Method for configuring a computer bus adapter circuit board without the use of jumpers or switches |
| 06/26/1991 | EP0433489A1 Method to purge a memory of objects, which are no longer accessible during program run |
| 06/26/1991 | CN1052562A Main storage memory cards having single bit set and reset functions |
| 06/25/1991 | US5027398 Copy prevention apparatus and method therefor |
| 06/25/1991 | US5027397 Data protection by detection of intrusion into electronic assemblies |
| 06/25/1991 | US5027396 Execution protection for floppy disks |
| 06/25/1991 | US5027317 Method and circuit for limiting access to a RAM program memory |
| 06/25/1991 | US5027313 Apparatus for determining maximum usable memory size |
| 06/25/1991 | US5027273 Method and operating system for executing programs in a multi-mode microprocessor |
| 06/25/1991 | US5027270 Processor controlled interface with instruction streaming |
| 06/19/1991 | WO1991009364A1 Direct access storage device with independently stored parity |
| 06/19/1991 | EP0433269A2 Volume verification method and apparatus |
| 06/19/1991 | EP0432807A2 Microprocessor having internal cache memory |
| 06/19/1991 | EP0432575A2 Data processor having wait state control unit |
| 06/19/1991 | EP0432524A2 Cache memory architecture |
| 06/19/1991 | EP0432359A2 Method and apparatus for performing memory protection operations in a parallel processor system |
| 06/19/1991 | CA2070820A1 Direct access storage device with independently stored parity |
| 06/18/1991 | US5025421 Single port dual RAM |
| 06/18/1991 | US5025420 Portable semiconductor memory device |
| 06/18/1991 | US5025415 Memory card |
| 06/18/1991 | US5025367 Storage allocation and garbage collection using liberate space tokens |
| 06/18/1991 | US5025366 Organization of an integrated cache unit for flexible usage in cache system design |
| 06/18/1991 | US5025365 Hardware implemented cache coherency protocol with duplicated distributed directories for high-performance multiprocessors |
| 06/18/1991 | US5025364 Microprocessor emulation system with memory mapping using variable definition and addressing of memory space |
| 06/18/1991 | CA1285075C Dual byte order computer architecture |
| 06/18/1991 | CA1285072C Method for concurrent record access using an index tree |
| 06/13/1991 | DE4038325A1 Data writing onto magnetic disc - holding data in cache memory and transferring onto tracks on multiple discs |
| 06/12/1991 | EP0431463A2 Two-level translation look-aside buffer using partial addresses for enhanced speed |
| 06/12/1991 | CN1012855B Cache resiliency in processing veriety of address faults |
| 06/11/1991 | US5023867 Protocol and apparatus for selectively scanning a plurality of lines connected to a communication device |
| 06/11/1991 | US5023777 Information processing system using domain table address extension for address translation without software modification |
| 06/11/1991 | US5023776 Store queue for a tightly coupled multiple processor configuration with two-level cache buffer storage |
| 06/11/1991 | US5023773 Authorization for selective program access to data in multiple address spaces |
| 06/11/1991 | US5023772 Method and system for storing messages based upon a non-queried name assignment |
| 06/11/1991 | US5023718 Storing digital video signals |
| 06/06/1991 | DE4021251A1 Multiprocessor system with high speed data exchange - has address generator combining offset register values with bus address values, requires no data communications software |
| 06/05/1991 | EP0430668A2 Method and system for reclaiming unreferenced computer memory space |
| 06/05/1991 | EP0430482A2 Technique for information protection on fault-tolerant redundant information storage devices |
| 06/05/1991 | EP0429733A2 Multiprocessor with crossbar between processors and memories |
| 06/05/1991 | CN1052003A Extended addressing using sub-addressed segment register |
| 06/04/1991 | US5022077 Apparatus and method for preventing unauthorized access to BIOS in a personal computer system |
| 06/04/1991 | US5022004 Method and apparatus for DRAM memory performance enhancement |
| 06/04/1991 | US5021992 Method of translating data from knowledge base to data base |
| 06/04/1991 | US5021977 Image data read out system in a digital image processing system |
| 06/04/1991 | US5021951 Data Processor |
| 06/04/1991 | US5021946 Mostly contiguous file allocation technique involving file extension |
| 05/30/1991 | WO1991007722A1 System for memory data integrity |
| 05/29/1991 | EP0429252A2 System and method for storing firmware in relocatable format |
| 05/29/1991 | EP0428917A2 Internal cache microprocessor slowdown circuit with minimal system latency |
| 05/29/1991 | EP0428597A1 Disk emulation system |
| 05/29/1991 | DE4019473A1 Write protect facility - uses code word generation and comparison to control removal of write protect condition |
| 05/28/1991 | US5019971 High availability cache organization |
| 05/28/1991 | US5019965 Method and apparatus for increasing the data storage rate of a computer system having a predefined data path width |
| 05/28/1991 | US5019963 Data processing network with upgrading of files |
| 05/28/1991 | CA1284535C Single cycle processor/cache interface |
| 05/22/1991 | EP0428329A2 Extended addressing circuitry |