Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 12 - Accessing, addressing or allocating within memory systems or architectures
Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539)
12/1996
12/18/1996CN1138189A Reproducing apparatus having buffer memory and capable of rapidly restarting reproduction and method of controlling the apparatus
12/18/1996CN1138177A Computer network for www server data access over internet
12/18/1996CN1138176A Interface with device having unusual access time and method thereof
12/17/1996US5586326 Object base data processing apparatus
12/17/1996US5586316 System and method for information retrieval with scaled down image
12/17/1996US5586315 Computer program product for off-loading host-based DBMS predicate evaluation to a disk controller
12/17/1996US5586310 System for distributed database replicated read with exclusive central server transfer of primary copies
12/17/1996US5586304 Automatic computer upgrading
12/17/1996US5586303 Structure and method for providing a cache memory of selectable sizes
12/17/1996US5586300 Flexible addressing memory controller wherein multiple memory modules may be accessed according to comparison of configuration addresses
12/17/1996US5586298 Effective use of memory bus in a multiprocessing environment by controlling end of data intervention by a snooping cache
12/17/1996US5586297 Partial cache line write transactions in a computing system with a write back cache
12/17/1996US5586296 Cache control system and method for selectively performing a non-cache access for instruction data depending on memory line access frequency
12/17/1996US5586295 Combination prefetch buffer and instruction cache
12/17/1996US5586293 Real time cache implemented by on-chip memory having standard and cache operating modes
12/17/1996US5586292 Data processing method using record division storing scheme and apparatus therefor
12/17/1996US5586291 Disk controller with volatile and non-volatile cache memories
12/17/1996US5586290 Cache system of external storage device
12/17/1996US5586287 Information processing apparatus capable of holding storage contents of PSRAM even when system clock comes to abnormal halt
12/17/1996US5586286 Memory controller having flip-flops for synchronously generating DRAM address and control signals from a single chip
12/17/1996US5586285 Method and circuitry for increasing reserve memory in a solid state memory disk
12/17/1996US5586283 In a computer system
12/17/1996US5586282 Memory system employing pipeline process for accessing memory banks
12/17/1996US5586280 Method and apparatus for appending data to compressed records previously stored on a sequentially-accessible storage medium
12/17/1996US5586274 Atomic operation control scheme
12/17/1996US5586269 Communication control device and method for automatically determining a self-address
12/17/1996US5586264 Video optimized media streamer with cache management
12/17/1996US5586248 Disk drive controller with a posted write cache memory
12/17/1996US5586247 Data updating system capable of partially recovering data
12/17/1996US5586245 Data processor having page turning function for managing a plurality of data sets
12/17/1996US5586239 Computer controlled graphics display system for supporting information classification
12/17/1996US5586081 Synchronous address latching for memory arrays
12/17/1996US5586078 Dynamic type memory
12/17/1996US5585857 Method of transmitting teletext page codes for hexadecimal pages
12/12/1996WO1996039667A1 Write cache for write performance improvement
12/12/1996WO1996039666A1 Reducing cache snooping overhead in a multilevel cache system with multiple bus masters and a shared level two cache
12/12/1996WO1996039665A1 Method and apparatus for reducing cache snooping overhead in a multilevel cache system
12/12/1996WO1996039664A1 Memory controller for both interleaved and non-interleaved memory
12/12/1996WO1996039661A1 Error detection and correction method and apparatus
12/12/1996WO1996039659A1 Synchronisation procedure in a routing node
12/12/1996WO1996039657A1 Apparatus and method for reducing read miss latency
12/12/1996WO1996039653A1 Reserved cylinder for scsi device write-back cache
12/12/1996DE19620847A1 Textured mapping e.g. for computer graphics
12/12/1996DE19616346A1 Computersystem mit optimierter Anzeigensteuerung Computer system with optimized display control
12/12/1996DE19537305A1 Solid state flash memory hard disc emulator for DOS environment
12/11/1996EP0748095A2 System and method for database access administration
12/11/1996EP0748087A1 Access control system for a shared buffer
12/11/1996EP0748079A2 Communication path verification in a fail-fast, fail-functional, fault-tolerant multiprocessor system
12/11/1996EP0747872A1 Video processor with addressing mode control
12/11/1996EP0747860A2 Texture mapping data storage allocation method and system
12/11/1996EP0747859A2 Interrupt scheme for updating a local memory
12/11/1996EP0747858A2 Texture cache
12/11/1996EP0747845A1 Computer network for WWW server data access over internet
12/11/1996EP0747844A1 A method for distributed task fulfillment of web browser requests
12/11/1996EP0747843A1 A method for fulfilling requests of a web browser
12/11/1996EP0747842A1 A web browser system
12/11/1996EP0747841A1 A sub-agent service for fulfilling requests of a web browser
12/11/1996EP0747840A1 A method for fulfilling requests of a web browser
12/11/1996EP0747839A1 Database management system with improved indexed accessing
12/11/1996EP0747834A1 Video processor
12/11/1996EP0747833A2 Fault-tolerant multiprocessor system
12/11/1996EP0747832A2 Customer information control system and method in a loosely coupled parallel processing environment
12/11/1996EP0747828A2 System and method for providing efficient shared memory in a virtual memory system
12/11/1996EP0747827A1 System and method for providing shared memory using shared virtual segment identification in a computer system
12/11/1996EP0747826A2 Cache system with simultaneous tag comparison
12/11/1996EP0747825A2 SDRAM data allocation system and method
12/11/1996EP0747822A2 External storage system with redundant storage controllers
12/11/1996EP0747821A2 Method for detecting divergence between a pair of duplexed, synchronized processor elements
12/11/1996EP0747820A2 Method of synchronizing a pair of central processor units for duplex, lock-step operation
12/11/1996EP0747816A2 Method and system for high performance multithread operation in a data processing system
12/11/1996EP0747814A1 Customer information control system and method with transaction serialization control functions in a loosely coupled parallel processing environment
12/11/1996EP0747813A2 Customer information control system and method with temporary storage queuing functions in a loosely coupled parallel processing environment
12/11/1996EP0747812A2 Customer information control system and method with API start and cancel transaction functions in a loosely coupled parallel processing environment
12/11/1996EP0747808A2 Processor capable of supporting two distinct instruction set architectures
12/11/1996EP0747803A2 Clock for a fail-fast, fail-functional, fault-tolerant multiprocessor system
12/11/1996EP0746823A1 Bit mapping apparatus and method
12/11/1996EP0746819A1 Data storage management for network interconnected processors
12/11/1996EP0746818A1 Method and device for backing up and/or archiving data and/or computer files
12/10/1996US5584044 Integrated circuit memory card for write in/read out capability having plurality of latching means for expandable addressing using counting means for enabling latches thereof
12/10/1996US5584042 Dynamic I/O data address relocation facility
12/10/1996US5584029 Data protecting system for an echangeable storage medium comprising power supply control means, medium detection means and medium identifying means
12/10/1996US5584024 Interactive database query system and method for prohibiting the selection of semantically incorrect query parameters
12/10/1996US5584022 Enciphered file sharing method
12/10/1996US5584018 Information memory apparatus having a plurality of disk drives and calculating and re-allocating data according to access frequency
12/10/1996US5584017 Cache control which inhibits snoop cycles if processor accessing memory is the only processor allowed to cache the memory location
12/10/1996US5584015 Buffer memory management method, recording medium, and computer system incorporating same
12/10/1996US5584014 Method of storing information in a computer memory
12/10/1996US5584013 Hierarchical cache arrangement wherein the replacement of an LRU entry in a second level cache is prevented when the cache entry is the only inclusive entry in the first level cache
12/10/1996US5584012 Cache control method and rotary storage device having cache control
12/10/1996US5584011 Multiprocessor system with parallel execution of data
12/10/1996US5584009 System and method of retiring store data from a write buffer
12/10/1996US5584008 External storage unit comprising active and inactive storage wherein data is stored in an active storage if in use and archived to an inactive storage when not accessed in predetermined time by the host processor
12/10/1996US5584007 Apparatus and method for discriminating among data to be stored in cache
12/10/1996US5584005 Virtual memory address translation apparatus and method using link, auxiliary link and page tables
12/10/1996US5584004 Data processing system having subsystems connected by busses
12/10/1996US5584003 Control systems having an address conversion device for controlling a cache memory and a cache tag memory
12/10/1996US5584002 Cache remapping using synonym classes
12/10/1996US5583985 Graphic display processing apparatus for improving speed and efficiency of a window system
12/10/1996US5583974 Computer graphics system having high performance multiple layer Z-buffer
12/10/1996US5583823 Dram refresh circuit
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