Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
06/2001
06/13/2001EP1107457A2 Method of synchronizing a phase-locked loop, phase-locked loop and semiconductor provided with same
06/13/2001EP1107456A2 Method for adjusting the output frequency generated by a controllable frequency oscillator
06/13/2001EP1106027A1 Synchronisation of a low power clock in a wireless communication device
06/13/2001EP1105808A1 Digital delay locked loop with output duty cycle matching input duty cycle
06/13/2001EP1097511A4 Slave clock generation system and method for synchronous telecommunications networks
06/13/2001EP0756799B1 Device for deriving a clock signal from a synchronizing signal and a video recorder provided with the device
06/13/2001DE19937997A1 Phase-locked loop (PLL) circuit with override of reference signal drop-out
06/13/2001CN1299557A Data processing device
06/13/2001CN1299538A Transmitter/receiver unit
06/13/2001CN1299535A Phase-locked loop
06/12/2001US6247160 Hardware design for majority voting, and testing and maintenance of majority voting
06/12/2001US6246864 Wireless microphone use UHF band carrier FM transmitter
06/12/2001US6246738 Phase modulated reduction of clock wander in synchronous wide area networks
06/12/2001US6246737 Apparatus for measuring intervals between signal edges
06/12/2001US6246297 Phase and/or frequency modulated frequency synthesizer having two phase locked loops
06/12/2001US6246294 Supply noise immunity low-jitter voltage-controlled oscillator design
06/12/2001US6246292 Phase lock loop circuit with automatic selection of oscillation circuit characteristics
06/12/2001US6246291 Communication device with phase continuous synchronization to an external network
06/12/2001US6246277 Semiconductor integrated circuit device
06/12/2001US6246271 Frequency multiplier capable of generating a multiple output without feedback control
06/12/2001CA2195193C Digital phase locked loop
06/12/2001CA2051296C Method and device for synchronizing with an exterior event the sampling of measure signals by an over-sampling type digitizing set
06/11/2001CA2327907A1 Method and apparatus for detecting dual tone alerting signal in telephone systems
06/10/2001CA2328024A1 Clock signal generator/converter device
06/07/2001WO2001041351A1 Phase synchronization loop circuit and optical repeater provided with the circuit, optical terminal station device and optical communication system
06/07/2001US20010002804 Control circuit for programmable frequency synthesizer
06/07/2001US20010002799 Method of controlling a clock signal and circuit for controlling a clock signal
06/07/2001DE19959265A1 Verfahren zum Regeln der von einem frequenzsteuerbaren Oszillator abgegebenen Ausgangsfrequenz Method for controlling the output by a frequency-controllable oscillator output frequency
06/06/2001CN1298227A Reliable clock phase detecting logic circuit
06/06/2001CN1066875C Method and apparatus for measuring phase difference between pulse signals in communication facility
06/06/2001CN1066871C Apparatus and method for improving stability of transmitting frequency using COSTAS loop section
06/05/2001US6243784 Method and apparatus for providing precise circuit delays
06/05/2001US6243031 Selectable delay circuit having immunity to variations in fabrication and operating condition for write precompensation in a read/write channel
06/05/2001US6242965 Phase synchronization
06/05/2001US6242956 Phase locked loop
06/05/2001US6242955 Delay lock loop circuit, system and method for synchronizing a reference signal with an output signal
06/05/2001US6242954 Timing clock generation circuit using hierarchical DLL circuit
06/05/2001US6242953 Multiplexed synchronization circuits for switching frequency synthesized signals
05/2001
05/31/2001WO2000043849A3 Electronic phase-locking loop (pll)
05/31/2001US20010002175 Semiconductor memory device having function of supplying stable power supply voltage
05/31/2001US20010002115 Variable frequency oscillator, and phase locked loop and clock synchronizer using thereof
05/31/2001DE10054141A1 Delay control circuit for synchronous dynamic direct access memory has delay model for delaying external clock signal according to asymmetry, control signal generator, two delay devices
05/30/2001EP1104129A2 Telecommunication device with a clock generating unit
05/30/2001EP1104113A2 Clock and data recovery circuit for optical receiver
05/30/2001EP1104112A1 Wide band, low noise and high resolution synthesizer
05/30/2001EP1104111A1 Phase-locked loop with digitally controlled, frequency-multiplying oscilator
05/30/2001EP1104110A2 Phase-combining circuit and timing signal generator circuit for carrying out a high-speed signal transmission
05/30/2001EP1104104A2 Method for controlling a phase locked loop
05/30/2001EP1103970A2 System and method for disk recording
05/30/2001CN1297624A Compensation for phase errors caused by clock jitter in CDMA communication system
05/30/2001CN1297565A Phase-locked loop apparatus
05/30/2001CN1297286A Frequency synthesizer and oscillation frequency controlling method
05/30/2001CN1066597C Carrier phase lock detecting apparatus used in PSK-modulated signal receiver for satellite communication system
05/29/2001US6240556 Subscriber frequency control system and method in point-to-multipoint RF communication system
05/29/2001US6240152 Apparatus and method for switching frequency modes in a phase locked loop system
05/29/2001US6239660 Step-controlled frequency synthesizer
05/29/2001US6239641 Delay locked loop using bidirectional delay
05/29/2001US6239635 Self-timing control circuit
05/29/2001US6239634 Apparatus and method for ensuring the correct start-up and locking of a delay locked loop
05/29/2001US6239633 Digital DLL circuit
05/29/2001US6239632 Method, architecture and/or circuitry for controlling the pulse width in a phase and/or frequency detector
05/29/2001US6239631 Integrated circuit device with input buffer capable of correspondence with highspeed clock
05/29/2001US6239629 Signal comparison system and method for detecting and correcting timing errors
05/29/2001US6239627 Clock multiplier using nonoverlapping clock pulses for waveform generation
05/29/2001US6239626 Glitch-free clock selector
05/29/2001CA2254225C Phase modulated reduction of clock wander in synchronous wide area networks
05/25/2001WO2001037475A1 Comparison of frequencies between the data rate of a received data signal and the clock signal frequency of a local oscillator
05/25/2001WO2001037431A1 Flexible bit rate clock recovery unit
05/25/2001WO2001037430A1 Arrangement and method for implementing transmitter unit of digital data transmission system
05/25/2001WO2001037429A1 Method and apparatus for automatically generating a phase lock loop (pll)
05/25/2001WO2001037428A1 Zero-delay buffer circuit for a spread spectrum clock system and method therefor
05/25/2001WO2000079349A3 Method and apparatus for real time clock frequency error correction
05/25/2001CA2389224A1 Flexible bit rate clock recovery unit
05/24/2001US20010001601 Delayed locked loop implementation in a synchronous dynamic random access memory
05/23/2001EP1101671A1 Method and system of secured bidirectional transmission of data
05/23/2001EP1101285A1 Single chip cmos transmitter/receiver and vco-mixer structure
05/23/2001DE19954890A1 Verfahren zur Datenratendetektion und Datenratendetektor sowie Verfahren zur Regelung einer Phasenregelschleife und Phasenregelschleife Method for data rate detection and data rate detector as well as methods for controlling a phase-locked loop and phase-locked loop
05/23/2001DE19953578A1 Vorrichtung und Verfahren zur Erzeugung eines Taktsignals Apparatus and method for generating a clock signal
05/23/2001DE19946502C1 Schaltungsanordnung zum Erzeugen eines zu Referenztaktsignalen frequenzsynchronen Taktsignals Circuit arrangement for generating a frequency reference clock signals synchronous to the clock signal
05/22/2001US6236843 Radio terminal device for automatically correcting phase difference between a received signal and an internally generated signal
05/22/2001US6236703 Fractional-N divider using a delta-sigma modulator
05/22/2001US6236697 Clock recovery for multiple frequency input data
05/22/2001US6236696 Digital PLL circuit
05/22/2001US6236689 Device comprising a phase-locked loop, electronic apparatus comprising such a device and method of modulating the frequency of an oscillator
05/22/2001US6236687 Decision directed phase locked loop (DD-PLL) for use with short block codes in digital communication systems
05/22/2001US6236665 Transmission device
05/22/2001US6236632 Disk driver
05/22/2001US6236343 Loop latency compensated PLL filter
05/22/2001US6236278 Apparatus and method for a fast locking phase locked loop
05/22/2001US6236277 Low deviation synchronization clock
05/22/2001US6236275 Digital frequency synthesis by sequential fraction approximations
05/22/2001US6236251 Semiconductor integrated circuit with multiple selectively activated synchronization circuits
05/17/2001WO2001035533A1 Device and method for production of a clock signal
05/17/2001WO2001035529A2 Single chip cmos transmitter/receiver and method of using same
05/17/2001WO2001035523A1 Low phase noise vco circuit and method
05/17/2001DE19954696A1 Telekommunikationsgerät mit einer Taktgenerierungseinheit Telecommunications device with a clock generation unit
05/17/2001DE10053808A1 Locking detection circuit for recognizing locking state of phase-locked loop, has low-pass filter and trigger component coupled at output of flip-flop which sets and resets based on counter reading
05/16/2001EP1100201A1 Digital phase locked loop
05/16/2001CN1295386A Carrier reproduction circuit, receiver, loop filter circuit and oscillating circuit
05/16/2001CN1295381A Frequency synthesizer device and mobile radio device using the same