| Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643) |
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| 10/16/2001 | US6304622 Flexible bit rate clock recovery unit |
| 10/16/2001 | US6304620 Sign-cross product automatic frequency control loop |
| 10/16/2001 | US6304582 Synchronization system using multiple modes of operation |
| 10/16/2001 | US6304531 Disk reproducing device a disk reproducing method a disk rotation control method and a regenerative clock signal generating device |
| 10/16/2001 | US6304517 Method and apparatus for real time clock frequency error correction |
| 10/16/2001 | US6304296 Method and apparatus for adjusting dot clock signal |
| 10/16/2001 | US6304147 Method and circuit for reduced power consumption in a charge pump circuit |
| 10/16/2001 | US6304146 Method and apparatus for synthesizing dual band high-frequency signals for wireless communications |
| 10/16/2001 | US6304132 High side current source circuit having improved output impedance to reduce effects of leakage circuit |
| 10/16/2001 | US6304119 Timing generating apparatus with self-calibrating capability |
| 10/16/2001 | US6304118 Synchronous circuit having circuit for detecting phase error at center of reference signal |
| 10/16/2001 | US6304117 Variable delay circuit and semiconductor integrated circuit device |
| 10/16/2001 | US6304116 Delay locked looped circuits and methods of operation thereof |
| 10/16/2001 | US6304115 Phase locked loop having DC bias circuitry |
| 10/16/2001 | US6304113 Device for synchronizing a reference event of an analog signal on a clock |
| 10/16/2001 | US6304071 Phase detector that samples a read signal at sampling points and delay |
| 10/11/2001 | WO2001076072A1 Method for operating an oscillator and an electric circuit arrangement and a phase-locked loop |
| 10/11/2001 | WO2001037429A9 Method and apparatus for automatically generating a phase lock loop (pll) |
| 10/11/2001 | WO2001035529A3 Single chip cmos transmitter/receiver and method of using same |
| 10/11/2001 | WO2001024537A3 Method and apparatus for peak tracking a baseband signal |
| 10/11/2001 | US20010028695 Phase capacitor, and phase locked loop circuit having the same as well as method of phase comparison |
| 10/11/2001 | US20010028694 Phase locked loop circuit |
| 10/11/2001 | US20010028693 Method and circuit for glithch-free changing of clocks having different phases |
| 10/11/2001 | US20010028589 Self-refresh controlling apparatus |
| 10/11/2001 | US20010028276 Self-calibration device and method for calibrating phase offset between output waveforms of ring osciliator |
| 10/11/2001 | US20010028267 DLL circuit, semiconductor device using the same and delay control method |
| 10/11/2001 | US20010028266 Method for adjusting phase of controlling clock signal and semiconductor integrated circuit having delay locked loop circuit |
| 10/11/2001 | US20010028265 Semiconductor integrated circuit device |
| 10/11/2001 | US20010028264 Frequency converter enabling a non-integer division ratio to be programmed by means of a unique control word |
| 10/11/2001 | US20010028243 PLL semiconductor device with testability, and method and apparatus for testing same |
| 10/11/2001 | DE10016724A1 Circuit arrangement for reception of at least two digital signals |
| 10/11/2001 | CA2343424A1 Fractional synthesizer with phase jitter compensation |
| 10/10/2001 | EP1143623A1 Adaptive phase comparator and method of phase comparison in a phase locked loop circuit |
| 10/10/2001 | EP1143622A1 Phase-locked loop |
| 10/10/2001 | EP1143621A2 Digital phase control circuit |
| 10/10/2001 | EP1142121A1 Circuit for the frequency multiplication of an angle modulated signal using a pll and method |
| 10/10/2001 | EP1142120A1 Pll and gain control for clock recovery |
| 10/10/2001 | EP1141744A1 Method for detecting and correcting non-linearities of high-frequency voltage-controlled oscillators |
| 10/09/2001 | US6301191 Semiconductor memory device allowing reduction in power consumption during standby |
| 10/09/2001 | US6300841 Atomic oscillator utilizing a high frequency converting circuit and an active, low-integral-number multiplier |
| 10/09/2001 | US6300838 Method and apparatus for derivative controlled phase locked loop systems |
| 10/09/2001 | US6300808 Arrangement for offset current compensation of phase detector |
| 10/09/2001 | US6300803 Phase-comparison circuit |
| 10/04/2001 | WO2001073928A2 Method and circuit for reduced power consumption in a charge pump circuit |
| 10/04/2001 | WO2001053916A8 System and method for compensating for supply voltage induced signal delay mismatches |
| 10/04/2001 | US20010027092 Phase locked loop system |
| 10/04/2001 | US20010026597 Synthesizer receiver |
| 10/04/2001 | US20010026183 Signal processing circuits having a pair of delay locked loop (DLL) circuits for adjusting a duty-cycle of a periodic digital signal and methods of operating same |
| 10/04/2001 | US20010026179 Clock control circuit and clock control method |
| 10/04/2001 | EP1139569A1 Adjustment of the duty-cycle of a periodic digital signal with leading and triling edge DLLs |
| 10/04/2001 | EP1139568A2 System for high precision signal phase difference measurement |
| 10/04/2001 | EP1139565A1 Synchronous delay circuit |
| 10/04/2001 | EP1139201A2 Clock control circuit and clock control method |
| 10/04/2001 | EP1138119A1 Phase locked loop frequency generating circuit and a receiver using the circuit |
| 10/04/2001 | EP1101285A4 Single chip cmos transmitter/receiver and vco-mixer structure |
| 10/04/2001 | DE10013935A1 Clock signal generating device has digital controller that generates digital setting value which enables digital oscillator to adjust clock frequency of clock signal |
| 10/03/2001 | CN1315785A 数字相位分析器和合成器 Digital phase analyzer and synthesizer |
| 10/03/2001 | CN1315782A Synchronous delay circuit and semiconductor integrated circuit device |
| 10/03/2001 | CN1072417C Direct phase digitizing apparatus and method |
| 10/03/2001 | CN1072411C Method for controlling phase-locked loop, and phase-locked loop |
| 10/02/2001 | US6298106 Frequency synthesiser |
| 10/02/2001 | US6298105 Method and apparatus for a low skew, low standby power clock network |
| 10/02/2001 | US6298104 Clock recovery circuit |
| 10/02/2001 | US6298004 Semiconductor device, semiconductor system, and digital delay circuit |
| 10/02/2001 | US6297849 Output timebase corrector |
| 10/02/2001 | US6297708 Temperature compensated high performance oscillator |
| 10/02/2001 | US6297705 Circuit for locking an oscillator to a data stream |
| 10/02/2001 | US6297704 Oscillation circuits featuring coaxial resonators |
| 10/02/2001 | US6297703 Method and apparatus for producing an offset frequency |
| 10/02/2001 | US6297702 Phase lock loop system and method |
| 10/02/2001 | US6297680 Internal clock generator that minimizes the phase difference between an external clock signal and an internal clock signal |
| 09/27/2001 | WO2001071966A1 Multiple channel adaptive data recovery system |
| 09/27/2001 | WO2001071934A1 Communication system with frequency modulation and with a single local oscillator |
| 09/27/2001 | WO2001071921A1 Phase-locked loop |
| 09/27/2001 | WO2001071920A1 Phase-locked loop based clock phasing implementing a virtual delay |
| 09/27/2001 | WO2001071919A2 Bias modulated oscillator and method |
| 09/27/2001 | WO2001071918A1 An adjustable spread spectrum clock generator and a method thereof |
| 09/27/2001 | WO2001071917A2 Method and arrangement for the initialisation of a phase- or frequency-locked loop |
| 09/27/2001 | WO2001071445A1 Power supply control device, semiconductor device and method of driving semiconductor device |
| 09/27/2001 | US20010025350 Synchronous circuit |
| 09/27/2001 | US20010024943 Method and apparatus for generating a discretely variable capacitance for synthesizing high-frequency signals for wireless communications |
| 09/27/2001 | US20010024204 Method and apparatus for comparing frequently the phase of a target clock signal with the phase of a reference clock signal enabling quick synchronization |
| 09/27/2001 | US20010024142 Lock detector for phase locked loops |
| 09/27/2001 | US20010024135 Method and apparatus for generating a sequence of clock signals |
| 09/27/2001 | DE10013313A1 Synchronization of program modules used in telecommunication, involves adjusting clock generator of second program module based on determined time difference between clock signals of first and second modules |
| 09/27/2001 | DE10010947A1 Clock and data regenerator for different data transmission rates - uses comparison of reference data signal with clock signal provided by feedback frequency divider for controlling frequency divider division ratio |
| 09/26/2001 | EP1137188A2 Digital phase lock loop |
| 09/26/2001 | EP1137187A2 Phase locked loop |
| 09/26/2001 | EP1137186A1 An adjustable spread spectrum clock generator and a method thereof |
| 09/26/2001 | EP1135859A1 Method and apparatus for logic synchronization |
| 09/26/2001 | EP0796523B1 Comparator with smooth start-up for high frequencies |
| 09/26/2001 | CN1315080A Method for turning the bandwidth of a phase-locked loop |
| 09/26/2001 | CN1315077A Slave clock generation system and method for synchronous telecommuniations networks |
| 09/25/2001 | US6295563 Control system for recreating of data output clock frequency which matches data input clock frequency during data transferring |
| 09/25/2001 | US6295328 Frequency multiplier using delayed lock loop (DLL) |
| 09/25/2001 | US6295327 Method and apparatus for fast clock recovery phase-locked loop with training capability |
| 09/25/2001 | US6295316 Automatic equalization system |
| 09/25/2001 | US6294962 Circuit(s), architecture and method(s) for operating and/or tuning a ring oscillator |
| 09/25/2001 | US6294960 Phase lock loop circuit using signal estimator |
| 09/25/2001 | US6294944 Interface circuit and interface circuit delay time controlling method |