| Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643) |
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| 08/07/2001 | US6271696 Phase adjustment circuit |
| 08/07/2001 | CA2204089C Digital delay locked loop |
| 08/02/2001 | WO2001056161A1 System and method for phase-locking an electronic oscillator with an optical pulse |
| 08/02/2001 | US20010011013 System and method for on-chip filter tuning |
| 08/02/2001 | US20010010670 Storage media reading system |
| 08/02/2001 | US20010010475 Clock generation circuit |
| 08/02/2001 | DE19928998A1 Elektronische Schaltungsanordnung zur Erzeugung einer Sendefrequenz Electronic circuit arrangement for generating a transmit frequency |
| 08/02/2001 | DE10001376A1 Generating clock frequency - involves generating clock frequency depending on reference frequency in form of mains power supply network frequency, e.g. by deriving from mains hum frequency |
| 08/02/2001 | CA2297713A1 Method and apparatus for distributed synchronous clocking |
| 08/01/2001 | EP1120913A1 Method and apparatus for timing control |
| 08/01/2001 | EP1120912A1 Method and apparatus for timing control |
| 08/01/2001 | EP1119937A1 Variable spread spectrum clock |
| 08/01/2001 | EP1119900A1 Methods and apparatus for reducing mosfet body diode conduction in a half-bridge configuration |
| 07/31/2001 | US6269125 System and method for trellis encoding a digital signal |
| 07/31/2001 | US6269058 Wide capture range circuitry |
| 07/31/2001 | US6268780 Frequency synthesizer with digital frequency lock loop |
| 07/31/2001 | CA2213588C Remote accurate frequency generation using a numerically controlled oscillator |
| 07/26/2001 | WO2001054283A1 Pll circuit |
| 07/26/2001 | WO2001053916A2 System and method for compensating for supply voltage induced signal delay mismatches |
| 07/26/2001 | WO2000045213A9 Opto-electronic techniques for reducing phase noise in a carrier signal by carrier suppression |
| 07/26/2001 | WO2000028664A3 Fully integrated tuner architecture |
| 07/26/2001 | US20010009391 PLL controller, method of PLL control, and limiter |
| 07/26/2001 | US20010009385 Delay device having a delay lock loop and method of calibration thereof |
| 07/26/2001 | US20010009275 Clock synchronization circuit and semiconductor device having the same |
| 07/26/2001 | DE10064206A1 Delay lock loop for use in semiconductor memory device has OR gate which performs OR operation of output signals of bidirectional delay blocks, and outputs signal as final internal clock signal |
| 07/25/2001 | EP1119119A1 Local generator with PLL for phase synchronization of clock signal with bits in optical pulse stream |
| 07/25/2001 | EP1119107A2 System and method for controlling an oscillator |
| 07/25/2001 | EP1119106A2 Integrated oscillator circuit and associated methods |
| 07/25/2001 | EP1118219A1 Multistandard clock recovery circuit |
| 07/25/2001 | EP1118157A1 Fractional- n frequency synthesiser |
| 07/25/2001 | CN1305266A Method of synchronous phasee-locked loop, phas-locked loop and semiconductor device possessing phase-locked loop |
| 07/24/2001 | US6266799 Multi-phase data/clock recovery circuitry and methods for implementing same |
| 07/24/2001 | US6266383 Clock reproduction circuit and data transmission apparatus |
| 07/24/2001 | US6266381 Frequency control arrangement |
| 07/24/2001 | US6266377 Method of timing recovery convergence monitoring in modems |
| 07/24/2001 | US6266200 Magnetic disk storage apparatus |
| 07/24/2001 | US6265996 Low latency, low power deserializer |
| 07/24/2001 | US6265947 Power conserving phase-locked loop and method |
| 07/24/2001 | US6265946 Differential mode charge pump and loop filter with common mode feedback |
| 07/24/2001 | US6265945 Atomic frequency standard based upon coherent population trapping |
| 07/24/2001 | US6265930 Glitch free clock multiplexer circuit |
| 07/24/2001 | US6265919 In phase alignment for PLL's |
| 07/24/2001 | US6265918 Clock signal processing circuit and semiconductor device in which a clock signal is processed in improved method |
| 07/24/2001 | US6265916 Clock multiplier circuit capable of generating a high frequency clock signal from a low frequency input clock signal |
| 07/24/2001 | US6265904 Digital phase shift amplification and detection system and method |
| 07/24/2001 | US6265903 Clock signal generating circuit using variable delay circuit |
| 07/24/2001 | US6265902 Slip-detecting phase detector and method for improving phase-lock loop lock time |
| 07/24/2001 | CA2195277C Frequency synthesizer |
| 07/19/2001 | WO2001052427A1 Transmitter and radio communication terminal using the same |
| 07/19/2001 | WO2001052420A1 Digital divider as a local oscillator for frequency synthesis |
| 07/19/2001 | WO2001052419A1 Method and apparatus for improving capture and lock characteristics of phase lock loops |
| 07/19/2001 | WO2001052418A1 Bias disconnection for power saving in pll |
| 07/19/2001 | WO2001052417A2 Phase lock loop system and method |
| 07/19/2001 | WO2001052015A2 Circuit and method for filtering oscillations and synchronizing signals |
| 07/19/2001 | US20010008551 Phase-locked loop circuit and radio communication apparatus using the same |
| 07/19/2001 | US20010008430 System and method for providing a low power receiver design |
| 07/19/2001 | US20010008384 Method for generating frequencies in a dual phase locked loop |
| 07/19/2001 | DE19939104A1 Ladungspumpe Charge pump |
| 07/19/2001 | DE10100278A1 Clock circuit for IC device has different loads supplied via clock signal loads at different points on IC chip |
| 07/18/2001 | EP1117182A1 Phase locked loop |
| 07/18/2001 | EP1117177A2 Voltage controlled oscillator |
| 07/18/2001 | EP1116329A1 Frequency detection method for clock signal adjustment and frequency detection circuit for implementing said method |
| 07/18/2001 | EP1116323A1 Lock-in aid frequency detector |
| 07/18/2001 | EP1116087A1 Synchronous polyphase clock distribution system |
| 07/18/2001 | CN1304210A Oscillator with voltage control |
| 07/18/2001 | CN1068741C Method for calculating frequency-dividing ratio in numeral phase-locked loop and apparatus thereof |
| 07/18/2001 | CN1068740C PLL frequency synthesizer |
| 07/17/2001 | US6263032 Phase detector estimator |
| 07/17/2001 | US6262921 Delay-locked loop with binary-coupled capacitor |
| 07/17/2001 | US6262681 Method and apparatus for microwave signal generation that uses polarization selective photonic mixing |
| 07/17/2001 | US6262634 Phase-locked loop with built-in self-test of phase margin and loop gain |
| 07/17/2001 | US6262624 Phase delay based filter transconductance (Gm/C) compensation circuit |
| 07/17/2001 | US6262612 Using storage elements with multiple delay values to reduce supply current spikes in digital circuits |
| 07/17/2001 | US6262609 Closed-loop voltage-to-frequency converter |
| 07/17/2001 | US6262608 Delay locked loop with immunity to missing clock edges |
| 07/12/2001 | WO2001050610A1 Pll frequency synthesizer using controlled divider pulse widths |
| 07/12/2001 | WO2001050231A2 Encoded clocks to distribute multiple clock signals to multiple devices in a computer system |
| 07/12/2001 | WO2001050144A2 Phase detector |
| 07/12/2001 | WO2001049182A2 Correction of error angle in ultrasound flow measurement |
| 07/12/2001 | US20010007583 Digital PLL-based data detector for recorded data reproduction from storage medium |
| 07/12/2001 | US20010007480 Digital television receiver and timing recovering apparatus and method therefor |
| 07/12/2001 | US20010007436 Frequency detector and phase-locked loop circuit including the detector |
| 07/12/2001 | DE19949782C1 Phase-locked-loop circuit has charge pumping mechanism controlled by phase error, low-pass filter and inverter stage bias voltage generator between latter and voltage-controlled ring oscillator |
| 07/11/2001 | EP1115206A2 Voltage controlled oscillator assembly |
| 07/11/2001 | EP1115205A1 Pll circuit and radio communication terminal using pll |
| 07/11/2001 | EP1115198A2 Frequency detector and phase-locked loop circuit including the detector |
| 07/11/2001 | EP1114539A2 Circuit for recovering a data signal and regenerating a clock signal |
| 07/11/2001 | EP1114538A1 Triggered clock signal generator |
| 07/11/2001 | EP1114422A1 Synchronous circuit |
| 07/11/2001 | CN1303540A Method for deriving or calibrating frequency of pulse signal |
| 07/11/2001 | CN1068474C Digital phase correcting apparatus |
| 07/11/2001 | CN1068473C Phase detector for phase-lock-loop |
| 07/10/2001 | US6260176 Method and system for simulating and making a phase lock loop circuit |
| 07/10/2001 | US6260153 Automatic compensation circuit for no margin input data |
| 07/10/2001 | US6259755 Data clock recovery PLL circuit using a windowed phase comparator |
| 07/10/2001 | US6259754 Phase frequency detection circuit and method for liquid crystal display |
| 07/10/2001 | US6259727 Process and device for generating a plurality of derived clock signals |
| 07/10/2001 | US6259330 Ring oscillator having variable coarse and fine delays |
| 07/10/2001 | US6259328 Method and system for managing reference signals for network clock synchronization |
| 07/10/2001 | US6259327 PLL having circuits for selecting optimum VCO input/output characteristics |