Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
10/2000
10/25/2000CN1271476A Automatic tuning of an integrated oscillator
10/25/2000CN1271212A Delay element using delay locking ring
10/25/2000CN1271211A Time clock pulse regenerator
10/25/2000CN1057882C P11 synthesizer and method of controlling the same
10/24/2000US6137995 Circuit and method of generating a phase locked loop signal having an offset reference
10/24/2000US6137850 Digital bit synchronizer for low transition densities
10/24/2000US6137809 Quantization noise compensator apparatus and method
10/24/2000US6137373 Synchronous oscillation circuit operable in self-advancing oscillation during absence of synchronizing pulses
10/24/2000US6137372 Method and apparatus for providing coarse and fine tuning control for synthesizing high-frequency signals for wireless communications
10/24/2000US6137371 Voltage controlled oscillator including ring-shaped inverter circuits having voltage control circuits
10/24/2000US6137368 Frequency synthesizer with constant loop characteristics
10/24/2000US6137336 Circuit and method for generating multiphase clock
10/24/2000US6137334 Logic circuit delay stage and delay line utilizing same
10/24/2000US6137333 Optimal delay controller
10/24/2000US6137332 Clock signal generator and data signal generator
10/24/2000US6137328 Clock phase correction circuit
10/24/2000US6137327 Delay lock loop
10/24/2000US6137326 Clock signal producing device
10/24/2000US6137325 Device and methods in a delay locked loop for generating quadrature and other off-phase clocks with improved resolution
10/24/2000CA2231636C Self centering frequency multiplier
10/19/2000WO2000062428A2 Improvements relating to frequency synthesisers
10/19/2000WO2000062419A2 Mos variable gain amplifier
10/19/2000DE19913084A1 Oscillator circuit for voltage controlled oscillator
10/19/2000DE10005597A1 Phase locked loop circuit for semiconductor integrated circuit, has selector which selects voltage controlled oscillation circuit of optimum oscillation frequency band from several oscillation circuits in oscillator
10/19/2000CA2370254A1 Improvements relating to frequency synthesisers
10/18/2000EP1045545A2 Clock recovery apparatus
10/18/2000EP1045518A1 Phase Mixer
10/18/2000EP1044504A1 Method and apparatus for reducing load pull in a phase locked loop frequency source
10/18/2000CN1270715A Apparatus and method for radio communication
10/18/2000CN1270713A Master-salve delay locked loop for accurate delay of non-periodic signals
10/17/2000US6134611 System for interface circuit to control multiplexer to transfer data to one of two internal devices and transferring data between internal devices without multiplexer
10/17/2000US6134284 Circuit and method for receiving system clock signals
10/17/2000US6134276 Timing recovery system
10/17/2000US6134064 Playback clock extracting apparatus
10/17/2000US6133932 Method and apparatus for adjusting a line synchronization signal in response to photoreceptor motion
10/17/2000US6133900 OSD device capable of maintaining the size of displayed OSD data at a constant in a multisync monitor regardless of a frequency of a horizontal synchronous signal
10/17/2000US6133861 Selectable delay circuit having immunity to variations in fabrication and operating condition for write precompensation in a read/write channel
10/17/2000US6133804 Transmitter with complex phase comparator
10/17/2000US6133803 Horizontal oscillator with gradual frequency switching circuit
10/17/2000US6133802 Synchronous carrier recovery circuit and injection locked oscillator
10/17/2000US6133800 Subminiature microwave cavity
10/17/2000US6133798 Oscillation system
10/17/2000US6133797 Self calibrating VCO correction circuit and method of operation
10/17/2000US6133783 Phase jitter canceller
10/17/2000US6133770 Phase locked loop circuit
10/17/2000US6133769 Phase locked loop with a lock detector
10/17/2000CA2212774C Circuit for causing fpll to lock in desired phase
10/17/2000CA2077532C Phase control circuit
10/12/2000WO2000060806A2 Dropout resistant phase-locked loop
10/12/2000WO2000060741A1 Method and apparatus for reducing oscillator noise by noise-feedforward
10/12/2000WO2000060740A1 Differential charge pump with common mode feedback
10/11/2000EP1042876A2 Method for frequency error estimation
10/11/2000EP1042871A1 Digital radio-frequency transceiver
10/11/2000EP0998788A4 Pulse stuffing circuit for programmable delay line
10/11/2000CN1269920A Oscillating circuit with piezoelectric quartz
10/11/2000CN1269651A Method and system for synchronising multiple subsystems using a voltage-controlled oscillator
10/11/2000CN1269640A Phase-locked loop circuit
10/10/2000US6131168 System and method for reducing phase error in clocks produced by a delay locked loop
10/10/2000US6130925 Frequency synthesizer
10/10/2000US6130602 Radio frequency data communications device
10/10/2000US6130584 Over-sampling type clock recovery circuit with power consumption reduced
10/10/2000US6130583 Atomic frequency standard using digital processing in its frequency lock loop
10/10/2000US6130577 Digital demodulators for phase modulated and amplitude-phase modulated signals
10/10/2000US6130565 Charge pump circuit, PLL circuit, and pulse-width modulation circuit
10/10/2000US6130561 Method and apparatus for performing fractional division charge compensation in a frequency synthesizer
10/10/2000US6130552 Programmable logic integrated circuit with on-chip DLL or PLL for clock distribution
10/10/2000CA2202844C Method and apparatus for temperature compensation of a reference oscillator in a communication device
10/10/2000CA2196844C Frequency sweep circuit
10/05/2000WO2000058965A1 Phase-locked loop apparatus
10/05/2000WO2000031915A3 A method and a circuit for retiming a digital data signal
10/05/2000WO2000031914A3 A method and a circuit for recovering a digital data signal and a clock from a received data signal
10/05/2000DE19910885A1 Schaltungsanordnung zum störungsfreien Initialisieren von Delay-Locked-Loop-Schaltungen mit Fast-Lock Circuitry for trouble-free initialization of delay-locked loop circuits with Fast-Lock
10/05/2000DE10006212A1 Phase synchronization circuit in display unit of computer, has divider which divides output of voltage controlled oscillator corresponding to detected period and returns it to oscillator
10/04/2000EP1041829A1 Dual-loop pll circuit and chrominance demodulation circuit using the same
10/04/2000EP1041749A1 FM optical transmission system using a voltage controlled oscillator
10/04/2000EP1040581A1 Multi-divide frequency division
10/04/2000EP1040580A1 Cmos output amplifier independent of temperature, supply voltage and manufacturing quality of transistors
10/04/2000EP1040578A1 A delay locked loop with harmonic lock detection
10/04/2000CN1269068A Charge pump steering systems and methods for loop filters of phase locked loops
10/04/2000CN1057177C Synchronization circuit using a high speed digital slip counter
10/04/2000CN1057176C Switched capacitor bandpass filter for detecting pilot signal
10/03/2000US6128359 Phase difference magnifier
10/03/2000US6127900 Dual frequency synthesis system
10/03/2000US6127896 Phase locked loop having control circuit for automatically operating VCO on an optimum input/output characteristic
10/03/2000US6127895 Clock pulse generator
10/03/2000US6127880 Active power supply filter
10/03/2000US6127866 Delay-locked-loop (DLL) having symmetrical rising and falling clock edge type delays
10/03/2000US6127865 Programmable logic device with logic signal delay compensated clock network
10/03/2000US6127859 All-digital minimal jitter frequency synthesizer incorporating an improved pulse stripping method to reduce spurious tones
10/03/2000US6127858 Method and apparatus for varying a clock frequency on a phase by phase basis
09/2000
09/28/2000WO2000057555A1 Frequency synthesiser
09/28/2000WO2000057552A1 Delay stabilization system for an integrated circuit
09/28/2000WO2000019641A9 Apparatus for low power radio communications
09/28/2000DE19911464A1 Verfahren und Anordnung zur automatischen Gewinnung von Taktsignalen zur Abtastung von Datensignalen unterschiedlicher Datenraten mit Hilfe eines Phasenregelkreises Method and arrangement for automatic extraction of clock signals for sampling data signals of different data rates by means of a phase-locked loop
09/27/2000EP1039707A1 Digital radio receiver
09/27/2000EP1039641A1 Method for synthesizing a clock signal and synthesizing device thereof
09/27/2000EP1039640A1 PLL circuit
09/27/2000EP1039638A1 Circuit for initialising fast-lock delay locked loop circuits without interference
09/27/2000EP1039637A1 Delay line with frequency range trimming
09/27/2000EP1038356A1 Sigma-delta modulator-controlled phase-locked-loop circuit and associated method