Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
05/2001
05/16/2001CN1295380A Low clock feed-through charge pumping circuit
05/15/2001US6233441 Method and apparatus for generating a discretely variable capacitance for synthesizing high-frequency signals for wireless communications
05/15/2001US6233297 Plesiochronous digital hierarchy low speed signal switching digital phase-locked loop system
05/15/2001US6233296 Circuit for generating a signal with adjustable frequency
05/15/2001US6233292 Digital communication device
05/15/2001US6233200 Method and apparatus for selectively disabling clock distribution
05/15/2001US6233023 Automatic fine tuning circuit
05/15/2001US6233020 Phase lock loop with selectable response
05/15/2001US6232952 Method and apparatus for comparing frequently the phase of a target clock signal with the phase of a reference clock signal enabling quick synchronization
05/15/2001US6232813 Phase locked loop integrated circuits having fuse-enabled and fuse-disabled delay devices therein
05/15/2001US6232812 Integrated circuit delay lines having programmable and phase matching delay characteristics
05/15/2001US6232811 Circuit for controlling setup/hold time of semiconductor device
05/15/2001US6232807 Pulse generating circuit
05/15/2001US6232806 Multiple-mode clock distribution apparatus and method with adaptive skew compensation
05/15/2001CA2253583C Phase locked loop
05/10/2001WO2001033870A2 Method and apparatus for reactivating a mobile station following a sleep period
05/10/2001WO2001033828A2 Slip-detecting phase detector and method for improving phase-lock loop lock time
05/10/2001WO2001033764A1 Clock pulse and data regenerator for different data rates
05/10/2001WO2001033249A2 Radio calibration by correcting the crystal oscillator frequency
05/10/2001US20010000952 Clock control method and circuit
05/10/2001DE19953886A1 Data synchronisation circuit arrangement
05/10/2001DE19952197A1 Takt- und Datenregenerator für unterschiedliche Datenraten Clock and data regenerator for different data rates
05/10/2001CA2387676A1 Method and apparatus for activating a high frequency clock following a sleep mode within a mobile station operating in a slotted paging mode
05/09/2001EP1098483A2 Carrier recovery circuit using a loop filter and an oscillator in a Costas loop
05/09/2001EP1098482A2 Method and System for correcting frequency offset using pilot signals
05/09/2001EP1098440A2 Time base generator
05/09/2001EP1098433A2 Frequency synthesizer and oscillation frequency control method
05/09/2001EP1097511A1 Slave clock generation system and method for synchronous telecommunications networks
05/09/2001CN1294785A Phase lock loop enabling smooth loop bandwidth switching
05/09/2001CN1294784A Digital synchronization of video signals
05/09/2001CN1294758A High-frequency module and method of manufacture thereof
05/09/2001CN1294738A Clock generation circuit
05/09/2001CN1294453A Method and device for calibrating FM PLL
05/09/2001CN1065693C Frequency detecting and controlling circuits of clockgenerator
05/08/2001US6229865 Phase difference detection circuit for liquid crystal display
05/08/2001US6229864 Phase locked loop lock condition detector
05/08/2001US6229858 Phaselock threshold correction
05/08/2001US6229774 Method and apparatus for a phase locked loop
05/08/2001US6229400 Method and apparatus for a calibrated frequency modulation phase locked loop
05/08/2001US6229399 Multiple frequency band synthesizer using a single voltage control oscillator
05/08/2001US6229364 Frequency range trimming for a delay line
05/08/2001US6229363 Semiconductor device
05/08/2001US6229362 Charge pump for adaptively controlling current offset
05/08/2001US6229361 Speed-up charge pump circuit to improve lock time for integer-N or fractional-N GSM wireless data/voice applications
05/08/2001US6229345 High speed charge-pump
05/03/2001WO2001031792A2 Systems and methods for holdover circuits in phase locked loops
05/03/2001WO2001031775A1 Apparatus for measuring intervals between signal edges
05/03/2001DE19947095A1 Frame clock synchronisation arrangement in data transmission system
05/03/2001DE19946764A1 Digitaler Phasenregelkreis Digital phase-locked loop
05/03/2001DE19946200A1 Phasenregelkreis Phase-locked loop
05/03/2001CA2324906A1 An arrangement for generating first and second alternating signals
05/02/2001EP1096687A2 Frequency synthesizer device and mobile radio device using the same
05/02/2001EP1096684A2 Display device comprising a function for automatically adjusting phase of sampling clocks
05/02/2001EP1096666A2 Oscillator and oscillation method
05/02/2001EP1096263A2 Jitter detector, phase difference detector and jitter detecting method
05/02/2001EP1095481A1 Apparatus and method for reducing clock signal phase skew in a master-slave system with multiple latent clock cycles
05/02/2001EP1095458A1 System for generating an accurate low-noise periodic signal
05/02/2001EP1095457A1 Method for tuning the bandwidth of a phase-locked loop
05/02/2001EP0771491B1 Very low noise, wide frequency range phase lock loop
05/02/2001EP0771490B1 Low noise, low voltage phase lock loop
05/02/2001CN1293834A Switch circuit
05/02/2001CN1293489A Phase-locked loop circuit capable of reducing phase deviation and not increasing operating voltage
05/02/2001CA2288495A1 Radio calibration by correcting the crystal frequency
05/01/2001US6226537 Portable radio device
05/01/2001US6226506 Method and apparatus for eliminating floating voltage nodes within a discreetly variable capacitance used for synthesizing high-frequency signals for wireless communications
05/01/2001US6226339 Method and system for detecting phase lock in a phase-locked loop
05/01/2001US6226045 Dot clock recovery method and apparatus
05/01/2001US6225870 Miniaturized microwave cavity for atomic frequency standard
05/01/2001US6225868 Voltage controlled oscillation circuit with plural voltage controlled current generating circuits
05/01/2001US6225843 Semiconductor integrated circuit device
05/01/2001US6225841 Semiconductor device using complementary clock and signal input state detection circuit used for the same
05/01/2001US6225840 Clock generation circuit which reduces a transition time period and semiconductor device using the same
04/2001
04/26/2001US20010000426 Phase-locked loop or delay-locked loop circuitry for programmable logic devices
04/26/2001DE19950360A1 PLL clock pulse generator with programmable transit time difference and frequency
04/25/2001EP1094632A2 Digital PLL device
04/25/2001EP1094622A1 Method for determining the frequency error on a local oscillator of a terminal
04/25/2001EP1094610A1 Digital phase-locked loop
04/25/2001EP1094609A2 PLL circuit which can reduce phase offset without increase in operation voltage
04/25/2001EP1094608A1 An improved delay-locked loop circuit
04/25/2001EP1094596A2 Quadrature receiver with a vco controlled by the demodulated bit-rate
04/25/2001EP1094381A2 Self-modulated type clock generating circuit
04/25/2001CN1292946A Phase detector
04/25/2001CN1292604A Low-voltage low-frequency offset control oscillator
04/24/2001US6223297 Clock modifying method and information processing apparatus which gradually increase frequency of an external clock to be supplied to processing unit
04/24/2001US6223061 Apparatus for low power radio communications
04/24/2001US6222895 Phase-locked loop (PLL) circuit containing a sampled phase detector with reduced jitter
04/24/2001US6222894 Digital delay locked loop for reducing power consumption of synchronous semiconductor memory device
04/24/2001US6222590 Phase-locked loop circuit
04/24/2001US6222424 Optically pumped atomic frequency standard
04/24/2001US6222422 Method and apparatus for generating a symmetrical output signal from a non-symmetrical input
04/24/2001US6222421 Phase-locked loop
04/24/2001US6222420 Minimizing recovery time
04/24/2001US6222419 Over-sampling type clock recovery circuit using majority determination
04/24/2001US6222408 Synchronous delay circuit
04/24/2001US6222402 Differential charge-pump with improved linearity
04/24/2001US6222401 Phase locked loop using gear shifting algorithm
04/24/2001US6222400 Lock-in detecting circuit having variable window for checking phase locked loop and method used therein
04/19/2001WO2001028151A1 Synchronizing pcm and pseudorandom clocks
04/19/2001WO2001028100A1 Low jitter phase-locked loop with duty-cycle control
04/19/2001WO2001001577A8 Adjustable bandwidth phase locked loop with fast settling time