Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
02/2002
02/06/2002CN1334644A Reduced flutter phase-locked loop using multistage digital delay line technique
02/06/2002CN1334643A Voltage controlled oscillation circuit
02/06/2002CN1079005C Frequency generator of radio communication system
02/05/2002US6345079 Clock signal generation apparatus
02/05/2002US6345068 Hierarchical delay lock loop code tracking system with multipath correction
02/05/2002US6344778 Voltage-controlled oscillator, phase synchronization circuit and signal processing circuit
02/05/2002US6344772 Apparatus and method for capacitance multiplication
02/05/2002CA2280878C An amplifier for continuous high gain, narrowband signal amplification
01/2002
01/31/2002WO2002009380A2 Data transmission using pulse with modulation
01/31/2002WO2002009291A1 Slew controlled frame aligner for a phase locked loop
01/31/2002WO2002009290A2 Analog phase locked loop holdover
01/31/2002WO2002009289A2 Phase locked loop having dc bias circuitry
01/31/2002WO2001061857A3 Method and apparatus for tuning an oscillator to a selected frequency
01/31/2002US20020012412 Phase lock loop circuit
01/31/2002US20020011902 High frequency oscillator
01/31/2002US20020011901 Fractional synthesizer comprising a phase jitter compensation
01/31/2002US20020011884 Phase control for oscillators
01/31/2002DE10034325A1 Abstimmschaltung für einen YIG-Oszillator Tuning for a YIG oscillator
01/30/2002EP1176752A2 Clock supply circuit
01/30/2002EP1176744A2 Clock supply device
01/30/2002EP1176724A1 Charge pump with current mirror
01/30/2002EP1175761A1 Ofdm demodulator with phase correction of the i-q signals
01/30/2002EP1175760A1 Method and circuit arrangement for adjusting the sampling rhythm of a phase-modulated signal
01/30/2002EP1175731A1 Fully integrated all-cmos am transmitter with automatic antenna tuning
01/30/2002EP0941580B1 Synchronisation unit for a component group
01/30/2002CN1333607A Multiple frequency band transmitted/received signal generator and generating method, and transmitter and receiver
01/30/2002CN1078794C Data segment driven AFC latch for bi-phase stable frequency phase locked loop
01/29/2002US6342819 Frequency synthesizer device and mobile radio device using the same
01/29/2002US6342818 PLL having switching circuit for maintaining lock during loss of input signal
01/29/2002US6342817 Precision oscillator circuits and methods with switched capacitor frequency control and frequency-setting resistor
01/29/2002US6342801 Duty cycle correction circuit of delay locked loop
01/29/2002US6342798 PLL circuit used temperature compensated VCO
01/29/2002US6342797 Delayed locked loop clock generator using delay-pulse-delay conversion
01/29/2002US6342796 Delay locked loop having fast locking time
01/24/2002WO2001022583A3 Pll with memory for electronic alignments
01/24/2002US20020010902 Field programmable gate array (FPGA) bit stream cormat
01/24/2002US20020010010 Process for reducing the electrical consumption of a transmitter/receiver of digital information, in particular a cellular mobile telephone, and corresponding transmitter/receiver
01/24/2002US20020009984 Method and apparatus for operating a PLL for synthesizing high-frequency signals for wireless communications
01/24/2002US20020009171 High speed phase alignment process and device
01/24/2002US20020009170 Phase rotator and data recovery receiver incorporating said phase rotator
01/24/2002US20020009167 Linear data recovery phase detector
01/24/2002US20020008591 Programmable ring oscillator
01/24/2002US20020008589 Digitally-controlled oscillator with switched-capacitor frequency selection
01/24/2002US20020008588 Direct digital frequency synthesizer and a hybrid frequency synthesizer combining a direct digital frequency synthesizer and a phase locked loop
01/24/2002US20020008586 PLL Frequency synthesizer circuit
01/24/2002US20020008585 Method and apparatus for synthesizing dual band high-frequency signals for wireless communications
01/24/2002US20020008560 Variable delay circuit and semiconductor integrated circuit device
01/24/2002US20020008558 Clock generation circuit, control method of clock generation circuit and semiconductor memory device
01/24/2002US20020008557 Reduced jitter phase lock loop using a technique multi-stage digital delay line
01/24/2002US20020008556 Delay-locked loop with binary-coupled capacitor
01/24/2002US20020008551 Clock synthesizer with programmable input-output phase relationship
01/24/2002US20020008540 Multi-master multi-slave system bus in a field programmable gate array (FPGA)
01/24/2002DE10120743A1 Schaltung zur Erkennung von Zyklus zu Zyklus auftretenden Synchronisationsstörungen A circuit for detection of cycle-to-cycle jitter occurring
01/24/2002DE10032822A1 Vorrichtung zur Erzeugung eines Oszillatorsignals Device for generating an oscillator signal
01/23/2002EP1175109A2 MPEG PCR jitter, frequency offset and drift rate measurements
01/23/2002EP1175010A1 High frequency oscillator
01/23/2002EP1175008A2 Low phase noise frequency converter
01/23/2002EP1174721A2 Jitter detecting apparatus and phase locked loop using the detected jitter
01/23/2002EP0929889B1 Matrix addressable display with delay locked loop controller
01/23/2002CN1332584A Local vibration source for RF phase lock
01/23/2002CN1078422C Video signal clamping circuit
01/22/2002US6340909 Method and apparatus for phase interpolation
01/22/2002US6340908 Phase adjusting circuit, scaling signal generation circuit using phase adjusting circuit, and position measuring apparatus using scaling signal generation circuit
01/22/2002US6340904 Method and apparatus for generating an internal clock signal that is synchronized to an external clock signal
01/22/2002US6340900 Phase detector with minimized phase detection error
01/22/2002CA2279031C Sweep pilot technique for a control system that reduces distortion produced by electrical circuits
01/17/2002WO2002005431A1 Frequency synthesizer
01/17/2002WO2002005429A2 Digital phase detector circuit and method therefor
01/17/2002WO2002005428A2 Digitally-synthesized loop filter circuit particularly useful for a phase locked loop
01/17/2002WO2001049182A3 Correction of error angle in ultrasound flow measurement
01/17/2002US20020007465 Method, modules and program modules for synchronization
01/17/2002US20020007264 Debug bi-phase export and data recovery
01/17/2002US20020006451 Debug output loosely coupled with processor block
01/17/2002US20020006179 Fractional N-divider, and frequency synthesizer provided with a fractional N-divider
01/17/2002US20020006178 Digital PLL pulse generating apparatus
01/17/2002US20020006171 Low phase noise frequency converter
01/17/2002US20020005764 Voltage controlled oscillator
01/17/2002US20020005763 Mode control of PLL circuit
01/17/2002US20020005762 Tuning circuit for a YIG oscillator
01/17/2002US20020005746 Internal clock generator generating an internal clock signal having a phase difference with respect to an external clock signal
01/17/2002US20020005741 DLL circuit that can prevent erroneous operation
01/17/2002DE10032248A1 Current source for phased locked loop, includes active components to control output and adjust potentials in intermediate nodes, improving regulation for VCO with phase control
01/17/2002DE10022486C1 Digitaler Phasenregelkreis Digital phase-locked loop
01/17/2002CA2378338A1 Frequency synthesizer
01/16/2002EP1172962A2 Bit rate agile clock recovery circuit
01/16/2002EP1172954A2 Method, module and module program for synchronisation
01/16/2002EP1172940A2 Multi-band transmission & reception-signal-generating apparatus
01/16/2002EP1171954A2 Improvements relating to frequency synthesisers
01/16/2002CN1078027C Clock generating circuit and method for exchange system
01/15/2002US6339711 Radio apparatus
01/15/2002US6339625 Clock generation circuit
01/15/2002US6339623 Reference carrier generator device for pulling a reference carrier out of a false stabilized point into a correct stabilized point of synchronism
01/15/2002US6339553 Clock generating circuit having additional delay line outside digital DLL loop and semiconductor memory device including the same
01/15/2002US6339354 System and method for eliminating pulse width variations in digital delay lines
01/15/2002US6339350 Phase difference—current conversion circuit
01/15/2002US6339345 Semiconductor device equipped with output circuit adjusting duration of high and low levels
01/10/2002WO2002003096A1 Device for producing an oscillator signal
01/10/2002US20020004926 Signal comparison system and method for detecting and correcting timing errors
01/10/2002US20020003847 Clock recovery circuit
01/10/2002US20020003453 Pll having switching circuit for maintaining lock during loss of input signal