Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
11/2001
11/06/2001US6314074 Recording information reproducing apparatus having circuits for reducing residual phase error
11/06/2001US6314052 Delayed locked loop implementation in a synchronous dynamic random access memory
11/06/2001US6313962 Combined read and write VCO for DASD PRML channels
11/06/2001US6313709 Phase-locked loop
11/06/2001US6313708 Analog phase locked loop holdover
11/06/2001US6313707 Digital phase-locked loop with pulse controlled charge pump
11/06/2001US6313688 Mixer structure and method of using same
11/06/2001US6313676 Synchronous type semiconductor integrated circuit having a delay monitor controlled by a delay control signal obtained in a delay measuring mode
11/06/2001US6313675 Delay locked loop driver
11/06/2001US6313674 Synchronizing circuit for generating internal signal synchronized to external signal
11/06/2001US6313622 Power source voltage controller
11/06/2001US6313621 Method and arrangement for determining the phase difference between two timing signals
11/06/2001US6313615 On-chip filter-regulator for a microprocessor phase locked loop supply
11/01/2001WO2000062428A3 Improvements relating to frequency synthesisers
11/01/2001WO2000028340A8 Analog clock module
11/01/2001US20010036817 Frequency synthesizer
11/01/2001US20010036240 Digital PLL (Phase-Locked Loop) frequency synthesizer
11/01/2001US20010036239 Phase locked loop circuit and method of frequency modulation in phase locked loop circuit
11/01/2001US20010035796 Adjusting untrimmed VCO during operation of the oscillator
11/01/2001US20010035795 Rubidium atom oscillator
11/01/2001US20010035784 Digital phase control circuit
11/01/2001US20010035781 Power adaptive frequency divider
11/01/2001US20010035775 Adjusting untrimmed VCO during operation of the oscillator
10/2001
10/31/2001EP1150426A2 Synthesizer receiver
10/31/2001EP1149482A1 Synchronizing method and apparatus
10/31/2001EP1149391A1 Multi-track integrated spiral inductor
10/31/2001DE10103879A1 Vorrichtung und Verfahren zur Jittermessung Apparatus and method for jitter measurement
10/31/2001DE10021273A1 Oszillator mit veränderbarer Induktivität Oscillator with variable inductance
10/31/2001CN1320331A Multi-standard clock recovery circuit
10/31/2001CN1320301A Fractional-N frequency synthesiser
10/31/2001CN1320298A Methods and apparatus for reducing mosfet body diode conduction in a half-bridge configuration
10/31/2001CN1319951A Synthesizer type receiver
10/31/2001CN1319788A Clock control circuit and method
10/30/2001US6311281 Apparatus and method for changing processor clock ratio settings
10/30/2001US6311050 Single integrated circuit phase locked loop for synthesizing high-frequency signals for wireless communications and method for operating same
10/30/2001US6310928 PLL circuit
10/30/2001US6310927 First order tuning circuit for a phase-locked loop
10/30/2001US6310653 Phase comparison and phase adjustment for synchronization to a reference signal that is asynchronous with respect to a digital sampling clock
10/30/2001US6310570 System with adjustable ADC clock phase
10/30/2001US6310523 Wide-range and low-power consumption voltage-controlled oscillator
10/30/2001US6310521 Reference-free clock generation and data recovery PLL
10/30/2001US6310505 Semiconductor integrated circuit, delay-locked loop having the same circuit, self-synchronizing pipeline type system, voltage-controlled oscillator, and phase-locked loop
10/30/2001US6310498 Digital phase selection circuitry and method for reducing jitter
10/30/2001CA2190222C A microwave multiphase detector
10/28/2001CA2344312A1 Multi-channel sonet/sdh desynchronizer
10/28/2001CA2307044A1 Multi-channel sonet/sdh desynchronizer
10/25/2001WO2001080428A1 Frequency synthesizer
10/25/2001WO2001080427A1 Pll-tuning system
10/25/2001WO2001080426A1 Pll circuit
10/25/2001WO2001079878A2 Personal communications device with gps receiver and comon clock source
10/25/2001US20010034475 Wireless lan system with cellular architecture
10/25/2001US20010034201 Method and apparatus for tenderizing meat
10/25/2001US20010033648 Method and apparatus for detecting dual tone alerting signal in telephone systems
10/25/2001US20010033630 Delay lock loop with clock phase shifter
10/25/2001US20010033407 Linear full-rate phase detector and clock and data recovery circuit
10/25/2001US20010033339 Jitter detecting circuit for detecting cycle-to-cycle jitter
10/25/2001US20010033201 Phase-locked loop enabling the generation of a reference signal having a high spectral purity
10/25/2001US20010033200 Frequency synthesizer
10/25/2001US20010033188 Clock data recovery circuitry associated with programmable logic device circuitry
10/24/2001EP1148648A1 Frequency synthesizer
10/24/2001EP1148647A2 Circuit arrangement for receiving at least two digital signals
10/24/2001EP1148646A1 Method of optimising digital signal sampling
10/24/2001EP0908013B1 Delay circuit and method
10/24/2001CN1318901A Frequency synthesizer
10/23/2001US6308055 Method and apparatus for operating a PLL for synthesizing high-frequency signals for wireless communications
10/23/2001US6308049 Fractional-spurs suppression scheme in frequency tracking multi-band fractional-N phase lock loop
10/23/2001US6307906 Clock and data recovery scheme for multi-channel data communications receivers
10/23/2001US6307904 Clock recovery circuit
10/23/2001US6307439 Voltage controlled oscillator with adaptive closed loop coarse tune
10/23/2001US6307413 Reference-free clock generator and data recovery PLL
10/23/2001US6307411 Wide tracking range, auto ranging, low jitter phase lock loop for swept and fixed frequency systems
10/18/2001WO2001078297A2 Method and apparatus for synchronizing data transmission and reception over a network
10/18/2001WO2001078227A2 Frequency modulator using a pll
10/18/2001WO2001078226A1 Circuit and method for generating phase-shifted signals
10/18/2001US20010031629 Superheterodyne receiver
10/18/2001US20010031627 Multiband frequency generation using a single PLL-circuit
10/18/2001US20010031028 Data clocked recovery circuit
10/18/2001US20010030903 Clock generating circuit ensuring a wide lock-allowing frequency range and allowing reduction in layout area as well as a semiconductor device provided with the same
10/18/2001US20010030572 Differential charge pump with low voltage common mode feedback circuit
10/18/2001US20010030566 Load equalization in digital delay interpolators
10/18/2001US20010030565 Multiphase clock generator and selector circuit
10/18/2001US20010030562 Methods and circuits for correcting a duty-cycle of a signal by delaying the signal and generating an output signal responsive to state transitions of the signal and the delayed version of the signal
10/18/2001US20010030560 Free-running mode device for phase locked loop
10/18/2001US20010030559 Phase-locked loop based clock phasing implementing a virtual delay
10/18/2001US20010030234 Method and apparatus for accessing product information using bar code data
10/17/2001EP1146647A1 Fractional-N synthesizer with phase jitter compensation
10/17/2001EP1146646A2 Phase locked state detecting apparatus and image processing apparatus
10/17/2001EP1146644A2 Method and circuit for correcting a duty-cycle of a signal
10/17/2001EP1146643A2 Phase shifter for use in a quadrature clock generator
10/17/2001EP1146642A2 Phase shifter for use in a quadrature clock generator
10/17/2001EP1146641A1 Automatic test equipment for semiconductor device
10/17/2001EP1146412A2 High speed serial link for fully duplexed data communication
10/17/2001EP1145440A1 Low jitter high phase resolution pll-based timing recovery system
10/17/2001EP1145439A2 Phase detector
10/17/2001EP1145438A1 Oscillator using a calibration means
10/17/2001EP1145437A2 Digital phase locked loop frequency synthesizer
10/17/2001EP1145430A2 Fully integrated tuner architecture
10/17/2001EP1145318A2 System and method for esd protection
10/17/2001EP0801848B1 Frequency synthesizer
10/16/2001US6304623 Precision timing generator system and method