| Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643) |
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| 08/27/2002 | US6442703 Clock regenerator |
| 08/27/2002 | US6442225 Multi-phase-locked loop for data recovery |
| 08/27/2002 | US6441692 PLL frequency synthesizer |
| 08/27/2002 | US6441691 PLL cycle slip compensation |
| 08/27/2002 | US6441690 Phase-locked loop frequency synthesizer |
| 08/27/2002 | US6441672 Circuit arrangement for generating the control potential for a field-effect transistor |
| 08/27/2002 | US6441667 Multiphase clock generator |
| 08/27/2002 | US6441664 Signal phase adjustment circuit to set optimum phase |
| 08/27/2002 | US6441662 DLL circuit that can prevent erroneous operation |
| 08/27/2002 | US6441661 PLL circuit |
| 08/27/2002 | US6441660 High speed, wide bandwidth phase locked loop |
| 08/27/2002 | US6441659 Frequency-doubling delay locked loop |
| 08/27/2002 | US6441658 Method and apparatus for vertically locking input and output signals |
| 08/27/2002 | US6441655 Frequency division/multiplication with jitter minimization |
| 08/27/2002 | US6441602 Method and apparatus for determining phase locked loop jitter |
| 08/22/2002 | WO2002065688A1 Timing extracting circuit of optical receiver using frequency clock that is half the data transmission rate, and duty shift adaptive circuit of optical transceiver |
| 08/22/2002 | WO2002065687A1 Direct digital synthesizer based on delay line with sorted taps |
| 08/22/2002 | WO2002049203A3 Precision oven-controlled crystal oscillator |
| 08/22/2002 | US20020116667 Adjusting a clock signal |
| 08/22/2002 | US20020116423 Programmable non-integer fractional divider |
| 08/22/2002 | US20020114616 Digital data play back apparatus and method for playing back digital data |
| 08/22/2002 | US20020114418 Multiple phase-locked loop circuit |
| 08/22/2002 | US20020114417 Model for charge pump phase-locked loop |
| 08/22/2002 | US20020114416 Phase alignment of data to clock |
| 08/22/2002 | US20020114386 Fractional N synthesizer with reduced fractionalization spurs |
| 08/22/2002 | US20020113892 Video switching detecting circuit |
| 08/22/2002 | US20020113660 Phase controlled oscillator |
| 08/22/2002 | US20020113658 Frequency synthesizer and low-noise frequency synthesizing method |
| 08/22/2002 | US20020113631 Charge pump and PLL |
| 08/22/2002 | US20020113630 Edge multiplier circuit |
| 08/22/2002 | US20020113625 Device for comparison of frequencies with low temporal inertia |
| 08/21/2002 | EP1233626A1 Digital video interface supporting transport of audio and auxiliary data |
| 08/21/2002 | EP1233568A1 Phase comparator circuit |
| 08/21/2002 | EP1233521A1 Method for synchronizing a clock signal with a reference signal |
| 08/21/2002 | EP1233520A2 Phase and frequency-locked loop circuits |
| 08/21/2002 | EP1233519A1 Multiple phase-locked loop circuit |
| 08/21/2002 | EP0840955B1 Microcontroller with firmware selectable oscillator trimming |
| 08/21/2002 | EP0733286B1 D/a for controlling an oscillator in a phase locked loop |
| 08/21/2002 | CN1365554A Clock signal feeder |
| 08/21/2002 | CN1365544A Communication system with frequency modulation and with a signal local oscillator |
| 08/21/2002 | CN1365541A System and method for programming oscillators |
| 08/21/2002 | CN1365190A PLL circuit with variable output frequency |
| 08/21/2002 | CN1089504C 时钟恢复电路 Clock recovery circuit |
| 08/20/2002 | US6438721 Method for testing a current mode interpolator |
| 08/20/2002 | US6438567 Method for selective filtering |
| 08/20/2002 | US6438188 Method and apparatus for a digitally controlled constant current source for phase adjustment of a synthesized clock |
| 08/20/2002 | US6438177 Digital satellite broadcasting receive in which loop bandwidth of PLL circuit is changed at the time of centering |
| 08/20/2002 | US6438155 Decoding chip streams |
| 08/20/2002 | US6438081 Storage media reading system |
| 08/20/2002 | US6438067 Clock generating circuit ensuring a wide lock-allowing frequency range and allowing reduction in layout area as well as a semiconductor device provided with the same |
| 08/20/2002 | US6437713 Programmable logic device having amplitude and phase modulation communication |
| 08/20/2002 | US6437650 Phase-locked loop or delay-locked loop circuitry for programmable logic devices |
| 08/20/2002 | US6437619 Clock generation circuit, control method of clock generation circuit, clock reproducing circuit, semiconductor memory device, and dynamic random access memory |
| 08/20/2002 | US6437618 Delay locked loop incorporating a ring type delay and counting elements |
| 08/20/2002 | US6437617 Method of controlling a clock signal and circuit for controlling a clock signal |
| 08/20/2002 | US6437616 Delay lock loop with wide frequency range capability |
| 08/20/2002 | US6437615 Loop filter and method for generating a control signal in phase-locked loop circuits |
| 08/20/2002 | US6437613 Clock generating circuit for compensation of delay difference using closed loop analog synchronous mirror delay structure |
| 08/20/2002 | US6437601 Using a timing strobe for synchronization and validation in a digital logic device |
| 08/20/2002 | US6435037 Multiplexed phase detector |
| 08/20/2002 | CA2256583C Pll for reproducing standard clock from random time information |
| 08/15/2002 | WO2002063772A2 Sigma-delta programming device for a pll-frequency synthesizer |
| 08/15/2002 | WO2002063771A2 Automatic wireless synchronization of electronic article surveillance systems |
| 08/15/2002 | WO2002063444A1 Method and device for generating a synchronisation variable and the corresponding integrated circuit and digital disc drive |
| 08/15/2002 | WO2002009290A3 Analog phase locked loop holdover |
| 08/15/2002 | US20020112194 Clock phase generator |
| 08/15/2002 | US20020110215 RZ recovery |
| 08/15/2002 | US20020110211 Direct digital synthesizer based on delay line with sorted taps |
| 08/15/2002 | US20020110210 Method and apparatus for adjusting timing in a digital system |
| 08/15/2002 | US20020110209 Transmission circuit and semiconductor device |
| 08/15/2002 | US20020110059 Recording clock generating device and method thereof |
| 08/15/2002 | US20020109554 Precise digital generator producing clock signals |
| 08/15/2002 | US20020109553 Voltage controlled oscillator |
| 08/15/2002 | US20020109552 System and method of tuning a voltage controlled oscillator |
| 08/15/2002 | US20020109537 Phase-locked loop for reducing frequency lock time |
| 08/15/2002 | US20020109536 Small-sized digital generator producing clock signals |
| 08/15/2002 | US20020109527 High-speed output driver |
| 08/15/2002 | US20020109495 Delay lock loop with wide frequency range capability |
| 08/14/2002 | EP1231796A2 System and method for increased data capacity of a digital video link |
| 08/14/2002 | EP1231795A2 Digital video interface with audio and auxiliary data |
| 08/14/2002 | EP1231752A2 Video encoding scheme supporting the transport of audio and auxiliary information |
| 08/14/2002 | EP1231751A2 Flexible video encoding scheme supporting audio and auxiliary information |
| 08/14/2002 | EP0941594A4 Carrier phase synchronization by reverse playback |
| 08/14/2002 | CN1364340A 时钟信号发生器 Clock signal generator |
| 08/14/2002 | CN1363994A Multi-input phase locked loop with interference-free reference switch |
| 08/14/2002 | CN1363993A Phase-locked loop circuit with wide tracking range, automatic distance measure and low joggle for sweep and fixed frequency system |
| 08/14/2002 | CN1363891A Apparatus and electronic instrument for controlling data delivery |
| 08/13/2002 | US6434206 Phase locked loop circuit for reducing lock-in time |
| 08/13/2002 | US6434187 Digital radiofrequency transceiver |
| 08/13/2002 | US6434083 Semiconductor memory device for implementing high speed operation of delay locked loop |
| 08/13/2002 | US6434062 Delay locked loop for use in semiconductor memory device |
| 08/13/2002 | US6433645 Programmable clock generator |
| 08/13/2002 | US6433644 Adjusting untrimmed VCO during operation of the oscillator |
| 08/13/2002 | US6433643 Reduced latency differentiator |
| 08/13/2002 | US6433607 Input circuit and semiconductor integrated circuit having the input circuit |
| 08/13/2002 | US6433599 Circuit for data signal recovery and clock signal regeneration |
| 08/13/2002 | US6433597 Delay locked loop with reduced noise response |
| 08/13/2002 | US6433596 Programmable on-chip damping coefficient for CMOS filter circuits that gives faster lockup times and lower jitter in phase lock loop circuits |
| 08/13/2002 | CA2292042C Phase locked loop |
| 08/13/2002 | CA2253461C Multiple input frequency locked loop |