| Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643) |
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| 07/24/2002 | CN1360397A Formation of pulse signal from clock signal |
| 07/24/2002 | CN1360396A Clock and data restoring circuit and its clock control method |
| 07/24/2002 | CN1088298C Two-purpose circuit for receiving and transmitting |
| 07/24/2002 | CN1088286C Oscillator and frequency synthesizer and communication apparatus using oscillator |
| 07/23/2002 | US6424230 Loop stabilization technique in a phase locked loop (PLL) with amplitude compensation |
| 07/23/2002 | US6424229 Tunable voltage controlled oscillator circuit having aided acquisition and methods for operating the same |
| 07/23/2002 | US6424228 Stabilized phase lock detection circuits and methods of operation therefor |
| 07/23/2002 | US6424199 Semiconductor device using complementary clock and signal input state detection circuit used for the same |
| 07/23/2002 | US6424193 Circuit for synchronizing frequencies of clock signals |
| 07/23/2002 | US6424192 Phase lock loop (PLL) apparatus and method |
| 07/23/2002 | US6424191 Low side current sink circuit having improved output impedance to reduce effects of leakage current |
| 07/23/2002 | US6424190 Apparatus and method for delay matching of full and divided clock signals |
| 07/23/2002 | US6424185 NCO based frequency synthesizer with jitter modulation |
| 07/23/2002 | US6424180 Digital phase shift amplification and detection system and method |
| 07/18/2002 | WO2002056489A2 Local oscillator leakage control in direct conversion processes |
| 07/18/2002 | WO2002056476A1 Pll circuit |
| 07/18/2002 | WO2002056475A2 Phase locked loop |
| 07/18/2002 | WO2002017050A3 Noise-shaped digital frequency synthesis |
| 07/18/2002 | WO2001095490A3 Method of digitally synthesizing frequencies with rational relationships to a reference frequency |
| 07/18/2002 | US20020095628 Apparatus and method for reducing skew of a high speed signal |
| 07/18/2002 | US20020094796 Phase detector circuit and method therefor |
| 07/18/2002 | US20020094055 Unified digital architecture |
| 07/18/2002 | US20020094054 Phase-locked loop lock detector circuit and method of lock detection |
| 07/18/2002 | US20020094053 Frequency dithering for DDS spectral purity |
| 07/18/2002 | US20020094052 Digital PLL with gear shift |
| 07/18/2002 | US20020094036 High precision, low phase noise synthesizer with vector modulator |
| 07/18/2002 | US20020093994 Reverse data de-skew method and system |
| 07/18/2002 | US20020093986 Forward data de-skew method and system |
| 07/18/2002 | US20020093592 Video signal processing device for automatically adjusting phase of sampling clocks |
| 07/18/2002 | US20020093384 High-directivity and adjusable directional couplers and method therefor |
| 07/18/2002 | US20020093367 System and method for compensating for supply voltage induced clock delay mismatches |
| 07/18/2002 | DE10160229A1 Phasenverriegelte Schleife mit Hitless-Referenzumschalten bei mehreren Eingängen A phase-locked loop with hitless reference switchover with multiple inputs |
| 07/18/2002 | DE10157786A1 Verarbeitung von digitalen Hochgeschwindigkeitssignalen Processing of high-speed digital signals |
| 07/18/2002 | DE10131091A1 Frequency synthesizer with phase control loop has reference oscillator tunable with respect to reference oscillator frequency, reference divider programmable with respect to division factor |
| 07/18/2002 | DE10101836A1 Fractional frequency synthesizer with multiple delay in fractional control logic has modulator with delay elements in feedback path to achieve significant increase in speed |
| 07/18/2002 | DE10064819A1 Adaptive Phasensteuerung für Ladungspumpen Adaptive control for charge pump phase |
| 07/18/2002 | DE10049531C2 Taktgenerator Clock generator |
| 07/17/2002 | EP1223704A2 Oversampling clock recovery having a high follow-up character using a few clock signals |
| 07/17/2002 | EP1223676A2 Automatic bias adjustment circuit for use in PLL circuit |
| 07/17/2002 | EP1223493A1 Power supply control device, semiconductor device and method of driving semiconductor device |
| 07/17/2002 | EP1222740A1 Phase-locking loop |
| 07/17/2002 | CN1359195A Phase detector |
| 07/16/2002 | US6421784 Programmable delay circuit having a fine delay element selectively receives input signal and output signal of coarse delay element |
| 07/16/2002 | US6421404 Phase-difference detector and clock-recovery circuit using the same |
| 07/16/2002 | US6420989 Programmable non-uniform clock signal generator |
| 07/16/2002 | US6420921 Delay signal generating apparatus and semiconductor test apparatus |
| 07/16/2002 | US6420918 Phase control for oscillators |
| 07/16/2002 | US6420917 PLL loop filter with switched-capacitor resistor |
| 07/16/2002 | US6420916 Phase locked loop filter utilizing a tuned filter |
| 07/16/2002 | US6420915 Signal comparison system and method for detecting and correcting timing errors |
| 07/16/2002 | US6420914 Charge pump circuit having switching circuits for reducing leakage currents |
| 07/16/2002 | US6420912 Voltage to current converter |
| 07/11/2002 | WO2002054648A2 Data de-skew method and system |
| 07/11/2002 | WO2002054598A2 Precision phase generator |
| 07/11/2002 | WO2002054597A2 Low-noise load pump for phase-locking loop |
| 07/11/2002 | WO2002054594A1 Architecture for field programmable gate array |
| 07/11/2002 | WO2001079878B1 Personal communications device with gps receiver and comon clock source |
| 07/11/2002 | WO2001011782A9 Stable phase locked loop having separated pole |
| 07/11/2002 | WO2000014879A3 Digital frequency synthesizer |
| 07/11/2002 | US20020091885 Data de-skew method and system |
| 07/11/2002 | US20020090917 Frequency synthesizer and method of generating frequency-divided signal |
| 07/11/2002 | US20020090045 Digital clock recovery system |
| 07/11/2002 | US20020090043 Clock signal recovery circuit used in receiver of universal serial bus and method of recovering clock signal |
| 07/11/2002 | US20020089737 Optical communication system, optical receiver and wavelength converter |
| 07/11/2002 | US20020089439 Noise compensation device and method in a discrete time control system |
| 07/11/2002 | US20020089438 Method of voltage controlled oscillator digital / analog converted value adjustment of compact disk read only memory device |
| 07/11/2002 | US20020089384 PLL circuit having a variable output frequency |
| 07/11/2002 | US20020089383 Synthesizer with lock detector, lock algorithm, extended range VCO, and a simplified dual modulus divider |
| 07/11/2002 | US20020089382 Charge pump circuit for improving switching characteristics and reducing leakage current and phase locked loop having the same |
| 07/11/2002 | US20020089381 Linear voltage controlled oscillator transconductor with gain compensation |
| 07/11/2002 | US20020089362 System and method for compensating for supply voltage induced clock delay mismatches |
| 07/11/2002 | US20020089361 Compensation for a delay locked loop |
| 07/11/2002 | US20020089360 Small-sized analog generator producing clock signals |
| 07/11/2002 | US20020089356 Digitally-synthesized loop filter circuit particularly useful for a phase locked loop |
| 07/11/2002 | US20020089320 Phase-detecting device |
| 07/11/2002 | DE10143051A1 Verzögerungsfangschaltung zum Reduzieren der Last einer variablen Verzögerungseinheit beim Hochfrequenzbetrieb und zum stabilen Verriegeln eines externen Taktsignals Fishing delay circuit for reducing the burden of a variable delay unit at high frequency operation and stable locking an external clock signal |
| 07/11/2002 | DE10136163A1 Konfiguration zur Erzeugung eines Taktes mit einer Verzögerungsschaltung und ein Verfahren hierfür Configuration for generating a clock having a delay circuit and a method thereof |
| 07/11/2002 | DE10064476A1 Verfahren zur Abstimmung einer PLL-Schaltung A method of tuning a PLL circuit |
| 07/11/2002 | DE10050294A1 PLL-Schaltung PLL |
| 07/10/2002 | EP1221221A1 Clock pulse and data regenerator for different data rates |
| 07/10/2002 | EP1221199A1 Transceiver with local oscillator frequency setting using the demodulated bit rate |
| 07/10/2002 | CN2500030Y Twin crystal vibration frequency synthesizer |
| 07/10/2002 | CN1358351A Method and apparatus for improving capture and lock characteristics of phase lock loops |
| 07/10/2002 | CN1087559C Video signal compressing device and method |
| 07/10/2002 | CN1087531C Dual-mode satellite/cellular phone with frequency synthesizer |
| 07/09/2002 | US6417739 Loop filter |
| 07/09/2002 | US6417738 Adaptive frequency-hopping oscillators |
| 07/09/2002 | US6417729 Linear power control loop |
| 07/09/2002 | US6417715 Clock generation circuit generating internal clock of small variation in phase difference from external clock, and semiconductor memory device including such clock generation circuit |
| 07/09/2002 | US6417714 Method and apparatus for obtaining linear code-delay response from area-efficient delay cells |
| 07/09/2002 | US6417706 Internal clock generator generating an internal clock signal having a phase difference with respect to an external clock signal |
| 07/09/2002 | US6417705 Output driver with DLL control of output driver strength |
| 07/09/2002 | US6417703 Frequency synthesizer using a ratio sum topology |
| 07/09/2002 | US6417698 Linearized digital phase-locked loop method |
| 07/09/2002 | US6417521 Transmission circuit and semiconductor device |
| 07/04/2002 | WO2002052776A1 Clock synchronization in a communications environment |
| 07/04/2002 | WO2002052775A1 Semiconductor integrated circuit |
| 07/04/2002 | WO2002052728A2 Synthesizer with lock detector, lock algorithm, extended range vco, and a simplified dual modulus divider |
| 07/04/2002 | US20020087911 Source synchronous bus |
| 07/04/2002 | US20020087217 Device and method for generating synchronous numeric signals |