Patents
Sitemap › H03 - Basic electronic circuitry › H03L - Automatic control, starting, synchronisation, or stabilisation of generators of electronic oscillations or pulses › H03L 7 - Automatic control of frequency or phase; Synchronisation
Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
10/2002
10/16/2002CN2517177Y Pulse signal processor used on full solid-state transmitter
10/16/2002CN1375149A 通信系统 Communications systems
10/16/2002CN1375127A PLL with memory for electronic alignments
10/16/2002CN1374655A Method for continuous write on recordable disc
10/15/2002US6466635 Process and device for generating a clock signal
10/15/2002US6466634 Radio frequency data communications device
10/15/2002US6466270 Phase locked loop circuit and method of controlling jitter of OSD characters
10/15/2002US6466100 Linear voltage controlled oscillator transconductor with gain compensation
10/15/2002US6466098 Analogue-controlled phase interpolator
10/15/2002US6466097 Phase locked loop and associated control method
10/15/2002US6466096 Tunable oscillator with leakage compensation
10/15/2002US6466086 Quadrature demodulator with phase-locked loop
10/15/2002US6466078 Reduced static phase error CMOS PLL charge pump
10/15/2002US6466073 Method and circuitry for generating clock
10/15/2002US6466071 Methods and circuits for correcting a duty-cycle of a signal
10/15/2002US6466070 Low voltage charge pump
10/15/2002US6466069 Fast settling charge pump
10/15/2002US6466068 Phase locked loop having DC bias circuitry
10/15/2002US6466067 PLL circuit with shortened lock-up time
10/15/2002US6466065 Prescaler and PLL circuit
10/15/2002US6466058 PLL lock detection using a cycle slip detector with clock presence detection
10/10/2002WO2002080390A1 Frequency plan
10/10/2002WO2002080351A1 System for controlling the frequency of an oscillator
10/10/2002WO2002080184A2 On-chip circuits for high speed memory testing with a slow memory tester
10/10/2002WO2002047270A8 Phase locked loop for recovering a clock signal from a data signal
10/10/2002WO2002005429A3 Digital phase detector circuit and method therefor
10/10/2002WO2002005428A3 Digitally-synthesized loop filter circuit particularly useful for a phase locked loop
10/10/2002WO2001086316A3 Method and apparatus for compensating local oscillator frequency error
10/10/2002US20020146084 Apparatus and method for oversampling with evenly spaced samples
10/10/2002US20020145478 Phase-locked loop circuit capable of adjusting the frequency range of spread spectrum clock
10/10/2002US20020145475 Dual conversion RF synthesizer utilizing improved push-push VCO design
10/10/2002US20020145474 Digitally controlled oscillator with recovery from sleep mode
10/10/2002US20020145473 Fractional integration and proportional multiplier control to achieve desired loop dynamics
10/10/2002US20020145472 Single-bit sigma-delta modulated fractional-N frequency synthesizer
10/10/2002US20020145457 PLL device and programmable frequency-division device
10/10/2002US20020145456 Multiplied clock generating circuit
10/10/2002US20020145409 Circuits and methods for synchronizing non-constant frequency switching regulators with a phase locked loop
10/10/2002DE10115385A1 Verfahren und Vorrichtung zur Takterhöhung einer Pulse-Output-DDS Method and apparatus for increasing a clock pulse output DDS
10/10/2002CA2704035A1 Enhanced wireless packet data communication system, method, and apparatus applicable to both wide area networks and local area networks
10/09/2002EP1248471A1 Digital phase locked loop for embedded signal clock recovery
10/09/2002EP1248394A2 Oscillator with noise reduction function, writing device, and method of controlling the writing device
10/09/2002EP1248378A1 Transmitter and radio communication terminal using the same
10/09/2002EP1248373A1 Apparatus for and method of generating a clock from an available clock of arbitrary frequency
10/09/2002EP1248352A2 Circuits and methods for synchronizing non-constant frequency switching regulators with a phase locked loop
10/09/2002CN1373934A Dual band VCO
10/09/2002CN1373931A 集成vco开关 Vco integrated switch
10/09/2002CN1373927A Stacked VCO resonator
10/09/2002CN1092425C Method and apparats for transmitting radio frequency signals
10/08/2002US6463112 Phase locked-loop using sub-sampling
10/08/2002US6463111 Method and apparatus for desynchronizing a DS-3 signal and/or an E3 signal from the data portion of an STS-STM payload
10/08/2002US6463109 Multiple channel adaptive data recovery system
10/08/2002US6463013 Clock generating apparatus and method thereof
10/08/2002US6463008 Semiconductor integrated circuit device
10/08/2002US6462726 Video signal processor
10/08/2002US6462624 High-speed and high-precision phase locked loop
10/08/2002US6462623 Method and apparatus for PLL with improved jitter performance
10/08/2002US6462599 Semiconductor integrated circuit device
10/08/2002US6462598 Delay time control circuit
10/08/2002US6462594 Digitally programmable phase-lock loop for high-speed data communications
10/08/2002US6462593 Compensation circuit for low phase offset for phase-locked loops
10/08/2002US6462592 Clock signal converting apparatus of a transmission system
10/08/2002US6462527 Programmable current mirror
10/03/2002WO2002078190A1 Method and device for increasing the rate of a pulsed output dds
10/03/2002WO2002078189A1 Linear fast-locking digital phase detector
10/03/2002WO2002078188A1 Apparatus for generating spread spectrum frequency-modulated clock pulses having reduced electromagnetic interference (emi)
10/03/2002WO2001024415A9 Method and apparatus for offset cancellation in a wireless receiver
10/03/2002US20020144222 Method of simulating PLL circuit and computer program product therefor
10/03/2002US20020144172 Tracking bin split technique
10/03/2002US20020144169 DS-3 desynchronizer
10/03/2002US20020144168 Circuit for producing a variable frequency clock signal having a high frequency low jitter pulse component
10/03/2002US20020141527 Locked loop circuit
10/03/2002US20020141526 Multiphase retiming mechanism
10/03/2002US20020141525 Data flow synchronization
10/03/2002US20020141515 Frame pattern detection in an optical receiver
10/03/2002US20020141089 Timing recovery loop latency reduction via loop filter pre-calculation
10/03/2002US20020140869 System and method for providing a low power receiver design
10/03/2002US20020140513 Phase-locked loop with composite feedback signal formed from phase-shifted variants of output signal
10/03/2002US20020140512 Polyphase noise-shaping fractional-N frequency synthesizer
10/03/2002US20020140504 Voltage controlled oscillator with frequency stabilized and PLL circuit using the same
10/03/2002US20020140491 Phase blender and multi-phase generator using the same
10/03/2002US20020140486 Multiphase clock generator
10/03/2002US20020140483 Timing generation circuit and method for timing generation
10/03/2002US20020140473 Apparatus and method for generating clock signals
10/03/2002US20020140472 Semiconductor device
10/03/2002US20020140471 Pre-divider architecture for low power in a digital delay locked loop
10/03/2002US20020140470 Mode switching method for PLL circuit and mode control circuit for PLL circuit
10/03/2002US20020140469 Low injection charge pump
10/03/2002US20020140461 Low voltage differential signaling output buffer
10/03/2002US20020140439 Reset circuit
10/03/2002US20020140412 Programmable current mirror
10/02/2002EP1246388A2 Clock recovery circuit and receiver circuit
10/02/2002EP1246369A2 Mode switching method for PLL circuit and mode control circuit for PLL circuit
10/02/2002EP1246368A2 Semiconductor device
10/02/2002EP1246356A1 Voltage controlled oscillator in a PLL circuit
10/02/2002DE10132799A1 Phase-locked loop e.g. for channel selection in transmitter or receiver, incorporates compensation of non-linearity of controlled oscillator tuning characteristic
10/02/2002DE10113530A1 Frequenzregelschleife zur Frequenzmodulation Frequency locked loop for frequency modulation
10/02/2002CN1372721A Method and arrangement for locking a control voltage to voltage-controlled oscillator
10/02/2002CN1372719A Power adaptive frequency divider
10/02/2002CN1091977C Clock synchronization method for non-integral number frequency multiplication system
10/01/2002US6459753 Fractional N-divider, and frequency synthesizer provided with a fractional N-divider
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