| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 06/23/1992 | US5124574 Semiconductor device for generating a voltage higher than power source potential or lower than grounding potential |
| 06/23/1992 | US5124570 Output control circuit |
| 06/23/1992 | CA1304138C Low current cmos translator circuit |
| 06/17/1992 | EP0490654A2 Output buffer |
| 06/17/1992 | EP0490553A2 High-speed emitter-coupled logic buffer |
| 06/17/1992 | EP0490377A2 Defect tolerant power distribution network for integrated circuits |
| 06/17/1992 | EP0490243A1 BICMOS tri-state output buffer |
| 06/17/1992 | EP0489734A1 High-speed dynamic cmos circuit. |
| 06/16/1992 | US5122920 Low voltage lockout circuit |
| 06/16/1992 | US5122692 High speed level conversion circuit including a switch circuit |
| 06/16/1992 | US5122690 Interface circuits including driver circuits with switching noise reduction |
| 06/16/1992 | US5122689 Cmos to ecl/cml level converter |
| 06/16/1992 | US5122687 Symmetrical exclusive-or gate, and modification thereof to provide an analog multiplier |
| 06/16/1992 | US5122686 Power reduction design for ECL outputs that is independent of random termination voltage |
| 06/16/1992 | US5122685 Programmable application specific integrated circuit and logic cell therefor |
| 06/16/1992 | US5122684 Current-injection logic (I2 L) driver for increasing fan-out |
| 06/16/1992 | US5122683 Ecl circuit with feedback controlled pull down in output |
| 06/16/1992 | US5122682 Source-coupled fet-logic-type logic circuit |
| 06/16/1992 | US5122681 Synchronous BiCMOS logic gate |
| 06/16/1992 | CA1303690C High frequency ecl voltage controlled ring oscillator |
| 06/10/1992 | EP0489570A2 Antifuse programming in an integrated circuit structure |
| 06/10/1992 | EP0489566A1 Apparatus and method for translating voltages |
| 06/09/1992 | US5121359 Configuration memory for programmable logic device |
| 06/09/1992 | US5121049 Voltage reference having steep temperature coefficient and method of operation |
| 06/09/1992 | US5121013 Noise reducing output buffer circuit with feedback path |
| 06/09/1992 | US5121006 Registered logic macrocell with product term allocation and adjacent product term stealing |
| 06/09/1992 | US5121005 Programmable logic array with delayed active pull-ups on the column conductors |
| 06/09/1992 | US5121003 Zero overhead self-timed iterative logic |
| 06/09/1992 | US5121002 Dynamic logic gates |
| 06/09/1992 | US5121001 Low power push-pull driver |
| 06/09/1992 | US5121000 Edge-rate feedback CMOS output buffer circuits |
| 06/09/1992 | US5120999 Output-buffer noise-control circuit |
| 06/09/1992 | US5120998 Source terminated transmission line driver |
| 06/09/1992 | US5120994 Bicmos voltage generator |
| 06/09/1992 | US5120992 CMOS output driver with transition time control circuit |
| 06/09/1992 | US5120991 Driver circuit for converting a cmos level signal to a high-voltage level |
| 06/09/1992 | US5120988 Clock generator circuit providing reduced current consumption |
| 06/09/1992 | CA1303231C Programmable input/output circuit |
| 06/09/1992 | CA1303151C High speed noise immune bipolar logic family |
| 06/09/1992 | CA1303150C True ttl output translator-driver with true ecl tri-state control |
| 06/05/1992 | CA2055896A1 Structure and method for programming antifuses in an integrated circuit array |
| 06/03/1992 | EP0488893A1 Method and device for conveying binary differential signals and application in carry select adders |
| 06/03/1992 | EP0488678A2 Programmable integrated circuit |
| 06/03/1992 | EP0488506A2 Differential receiver for detecting and correcting polarity inversion |
| 06/03/1992 | EP0488505A1 Frequency-divider circuit |
| 06/03/1992 | EP0488328A2 Bi-CMOS type semiconductor logic circuit |
| 06/03/1992 | EP0488034A2 Sequential logic circuit having state hold circuits |
| 06/03/1992 | EP0487917A2 High-speed low-power ECL/NTL circuits |
| 06/02/1992 | US5119202 Scan circuit with bootstrap drive |
| 06/02/1992 | US5118974 Tristate circuits with fast and slow OE signals |
| 06/02/1992 | US5118973 Emitter coupled logic circuit having independent input transistors |
| 06/02/1992 | US5118972 BiCMOS gate pull-down circuit |
| 06/02/1992 | US5118971 Adjustable low noise output circuit responsive to environmental conditions |
| 06/02/1992 | CA1302587C Fuzzy computers |
| 05/29/1992 | WO1992009141A1 Differential output buffer |
| 05/29/1992 | WO1992009140A1 Adjusting delay circuitry |
| 05/27/1992 | EP0487216A2 Input buffer with noise filter |
| 05/27/1992 | EP0487212A2 Integrated circuit having noise control means |
| 05/27/1992 | EP0486991A2 Programmable logic device |
| 05/27/1992 | EP0486880A1 High speed anti-undershoot & anti-overshoot circuit |
| 05/26/1992 | US5117134 CMOS or TTL to ECL level conversion device |
| 05/26/1992 | US5117133 Hashing output exclusive-OR driver with precharge |
| 05/26/1992 | US5117132 Flexible utilization of general flip-flops in programmable array logic |
| 05/26/1992 | US5117131 Buffer circuit having a voltage drop means for the purpose of reducing peak current and through-current |
| 05/26/1992 | US5117130 Integrated circuits which compensate for local conditions |
| 05/26/1992 | US5117129 Cmos off chip driver for fault tolerant cold sparing |
| 05/26/1992 | US5117127 Customizable logic integrated circuit with multiple-drain transistor for adjusting switching speed |
| 05/20/1992 | EP0486071A1 Digital transform circuit |
| 05/20/1992 | EP0486010A2 Multi-level logic input circuit |
| 05/19/1992 | US5115434 Different power source interface circuit |
| 05/19/1992 | US5115150 Low power CMOS bus receiver with small setup time |
| 05/19/1992 | US5115149 Bidirectional I/O signal separation circuit |
| 05/19/1992 | US5115148 Interface between two electrical circuits operated at different operating voltages |
| 05/19/1992 | CA1301267C High-speed electronic circuit having a cascode configuration |
| 05/19/1992 | CA1301262C Master slave buffer circuit |
| 05/14/1992 | WO1992008286A1 Programmable logic cell and array |
| 05/14/1992 | WO1992008187A1 Process and circuit for generating a logic output signal from logic input signals in accordance with a logic signal concatenation |
| 05/13/1992 | EP0485291A2 Level conversion circuit |
| 05/13/1992 | EP0485200A1 Semiconductor integrated circuit device having ECL gate circuits |
| 05/13/1992 | EP0485199A2 Creation of a factory-programmed device using a logic description and a sample device implementing the description |
| 05/13/1992 | EP0485102A2 Bus driver circuit |
| 05/13/1992 | EP0393027B1 Sense amplifier |
| 05/12/1992 | US5113366 Fuzzy membership function circuit |
| 05/12/1992 | US5113097 CMOS level shifter circuit |
| 05/12/1992 | US5113096 BiCMOS circuit |
| 05/12/1992 | US5113095 BiCMOS logic circuit with a CML output |
| 05/12/1992 | US5113087 Output circuit |
| 05/07/1992 | DE4038610C1 Fault-tolerant digital computer circuit - has normal function blocks and redundant function blocks with switching control |
| 05/06/1992 | EP0483833A1 Semiconductor integrated circuit device having cells with self-clamping terminal |
| 05/05/1992 | US5111414 Method and apparatus for truth table based noncontending optical crossbar switch |
| 05/05/1992 | US5111136 Semiconductor circuit |
| 05/05/1992 | US5111086 Adjusting delay circuitry |
| 05/05/1992 | US5111082 Superconducting threshold logic circuit |
| 05/05/1992 | US5111081 Process compensated input switching threshold of a CMOS receiver |
| 05/05/1992 | US5111080 Complementary signal transmission circuit with impedance matching circuitry |
| 05/05/1992 | US5111079 Power reduction circuit for programmable logic device |
| 05/05/1992 | US5111078 Input circuit for logic circuit having node and operating method therefor |
| 05/05/1992 | US5111077 BiCMOS noninverting buffer and logic gates |
| 05/05/1992 | US5111076 Digital superbuffer |
| 05/05/1992 | US5111075 Reduced switching noise output buffer using diode for quick turn-off |