Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
09/2013
09/24/2013US8541786 Packaged semiconductor device having improved locking properties
09/24/2013US8541784 Organic light-emitting display
09/24/2013US8541783 Electric double-layer capacitor and solar power generation device
09/24/2013US8541781 Semiconductor device and method for manufacturing the same
09/24/2013US8541780 Semiconductor device having oxide semiconductor layer
09/24/2013US8541779 Pixel structure of organic electroluminescence apparatus
09/24/2013US8541777 Color conversion film and multicolor-emitting, organic electroluminescent device comprising the color conversion film
09/24/2013US8541773 Vertical tunneling negative differential resistance devices
09/24/2013US8541772 Nitride semiconductor stacked structure and method for manufacturing same and nitride semiconductor device
09/24/2013US8541771 Semiconductor device and method of manufacturing the same
09/24/2013US8541770 Select devices including an open volume, memory devices and systems including same, and methods for forming same
09/24/2013US8541769 Formation of a graphene layer on a large substrate
09/24/2013US8541768 Semiconductor device having stacked structural bodies and method for manufacturing the same
09/24/2013US8541767 Memory component having an electrical contact free of a metal layer
09/24/2013US8541766 Nonvolatile memory device and nonvolatile memory apparatus
09/24/2013US8541317 Deposition method for passivation of silicon wafers
09/24/2013US8541302 Electronic device including a trench with a facet and a conductive structure therein and a process of forming the same
09/24/2013US8541282 Blocking layers for leakage current reduction in DRAM devices
09/24/2013US8541267 FinFET transistor with high-voltage capability and CMOS-compatible method for fabricating the same
09/24/2013US8541257 Aligned polymers for an organic TFT
09/24/2013US8540541 Light emitting device and method of manufacturing the same
09/24/2013CA2514230C Microelectromechanical systems having trench isolated contacts, and methods for fabricating same
09/19/2013WO2013138550A1 Plasma-chlorinated electrode and organic electronic devices using the same
09/19/2013WO2013138365A1 3,5-bis(10-naphthalenyl-anthracen-9-yl)pyridine compounds as hosts for light-emitting devices
09/19/2013WO2013138139A1 Packages and methods for packaging
09/19/2013WO2013137907A1 Low light adaptive imaging device
09/19/2013WO2013137605A1 Nanowire field-effect transistor and method for manufacturing same
09/19/2013WO2013137476A1 Semiconductor multi-layer substrate, semiconductor element, and production method therefor
09/19/2013WO2013137267A1 Nitride compound semiconductor element
09/19/2013WO2013137177A1 Semiconductor device, and method for producing semiconductor device
09/19/2013WO2013137116A1 Organic electronic device, organic electronic device manufacturing method and plasma processing device
09/19/2013WO2013137045A1 Semiconductor device and method for manufacturing same
09/19/2013WO2013136898A1 Semiconductor device
09/19/2013WO2013136550A1 Semiconductor device and method for manufacturing same
09/19/2013WO2013136331A1 Memory and logic device and methods for performing thereof
09/19/2013WO2013135411A1 High -voltage field -effect transistor and method of making the same
09/19/2013WO2013135226A1 Sensor arrangement comprising a carrier substrate and a ferroelectric layer and method for producing and using the sensor arrangement
09/19/2013WO2013134938A1 Array substrate and corresponding display panel
09/19/2013WO2013134899A1 Semiconductor device and producing method for same
09/19/2013WO2013134898A1 Semiconductor device and producing method for same
09/19/2013WO2013103379A3 N-metal film deposition with initiation layer
09/19/2013WO2012106834A8 Semiconductor device and related fabrication methods
09/19/2013WO2012075011A3 Method for deposition of nanoparticles onto substrates and high energy density device fabrication
09/19/2013US20130244416 Spacer structure of a field effect transistor with an oxygen-containing layer between two oxygen-sealing layers
09/19/2013US20130244414 Method for manufacturing semiconductor device having dual gate dielectric layer
09/19/2013US20130244413 Method for Fabricating a Semiconductor Device Having a Saddle Fin Transistor
09/19/2013US20130244396 Field effect transistors having an epitaxial layer on a fin and methods of fabricating the same
09/19/2013US20130244395 Methods for protecting patterned features during trench etch
09/19/2013US20130244393 Method for manufacturing semiconductor device
09/19/2013US20130244392 Method of fabricating fin-field effect transistors (finfets) having different fin widths
09/19/2013US20130244391 Semiconductor device and production method thereof
09/19/2013US20130244390 Extended drain lateral dmos transistor with reduced gate charge and self-aligned extended drain
09/19/2013US20130244389 Strained semiconductor device with facets
09/19/2013US20130244386 Self-aligned carbon electronics with embedded gate electrode
09/19/2013US20130244385 Method of manufacturing a semiconductor device
09/19/2013US20130244375 Semiconductor device and method for manufacturing the same
09/19/2013US20130244374 Method for manufacturing semiconductor device
09/19/2013US20130242670 Nonvolatile semiconductor storage device
09/19/2013US20130242659 Split-gate type nonvolatile memory device, semiconductor device having split-type nonvolatile memory device embedded therein, and methods of forming the same
09/19/2013US20130242618 Compound semiconductor device and method for manufacturing the same
09/19/2013US20130242223 Liquid crystal display device
09/19/2013US20130242220 Thin-film transistor, method of manufacturing the same and active matrix display panel using the same
09/19/2013US20130242218 Thin Film Transistor with Parasitic Capacitance Compensation Structure and Liquid Crystal Display Using Same
09/19/2013US20130241881 Photosensing transistors, methods of manufacturing the same, and display panels employing a photosensing transistor
09/19/2013US20130241543 Sensor and a method of manufacture of a sensor
09/19/2013US20130241344 Fuel-free nanowire motors
09/19/2013US20130241075 Contact or via critical dimension control with novel closed loop control system in chemical mechanical planarization process
09/19/2013US20130241061 Semiconductor element and method of manufacturing same
09/19/2013US20130241056 Well-through type diode element/component and manufacturing method for them
09/19/2013US20130241038 Structure and method for creating a reusable template for detachable thin film substrates
09/19/2013US20130241035 Strained Channel Dynamic Random Access Memory Devices
09/19/2013US20130241032 Semiconductor device having high frequency wiring and dummy metal layer at multilayer wiring structure
09/19/2013US20130241029 Semiconductor device and a method of manufacturing the same and designing the same
09/19/2013US20130241028 Silicon-on-insulator substrate and fabrication method
09/19/2013US20130241027 Semiconductor device having isolation region
09/19/2013US20130241014 Magnetoresistive random access memory (mram) package including a multilayer magnetic security structure
09/19/2013US20130241011 Semiconductor device with gate stack structure
09/19/2013US20130241010 Production Method for High-Purity Lanthanum, High-Purity Lanthanum, Sputtering Target Composed of High-Purity Lanthanum, and Metal Gate Film Containing High-Purity Lanthanum as Main Component
09/19/2013US20130241009 Semiconductor device
09/19/2013US20130241008 Use of Band Edge Gate Metals as Source Drain Contacts
09/19/2013US20130241007 Use of band edge gate metals as source drain contacts
09/19/2013US20130241006 Semiconductor layer structure
09/19/2013US20130241000 High-integration semiconductor memory device and method of manufacturing the same
09/19/2013US20130240994 Semiconductor device and method of manufacturing the same
09/19/2013US20130240993 Fully-depleted son
09/19/2013US20130240990 Semiconductor structure and method for manufacturing the same
09/19/2013US20130240989 Selective germanium p-contact metalization through trench
09/19/2013US20130240988 Transistors comprising high-k metal gate electrode structures and embedded strain-inducing semiconductor alloys formed in a late stage
09/19/2013US20130240987 Semiconductor field effect power switching device
09/19/2013US20130240986 Semiconductor Device Including Charged Structure and Methods for Manufacturing A Semiconductor Device
09/19/2013US20130240985 Semiconductor Device Including Auxiliary Structure and Methods for Manufacturing A Semiconductor Device
09/19/2013US20130240984 Transistor and method of manufacturing the same
09/19/2013US20130240983 Process for fabricating a field-effect transistor device implemented on a network of vertical nanowires, the resulting transistor device, an electronic device comprising such transistor devices and a processor comprising at least one such device
09/19/2013US20130240982 Quasi-vertical structure for high voltage mos device
09/19/2013US20130240981 Transistor array with a mosfet and manufacturing method
09/19/2013US20130240979 Gate structures
09/19/2013US20130240978 Nonvolatile semiconductor memory device
09/19/2013US20130240977 Semiconductor device and manufacturing method thereof
09/19/2013US20130240976 Nonvolatile semiconductor memory device and manufacturing method thereof
09/19/2013US20130240975 ROM FOR CONSTRAINING 2nd-BIT EFFECT
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