Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143) |
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05/04/2006 | US20060091485 Piezoelectric device and manufacturing method thereof |
05/04/2006 | US20060091484 Micro electromechanical systems thermal switch |
05/04/2006 | US20060091483 Method for making a semiconductor device with a high-k gate dielectric layer and a silicide gate electrode |
05/04/2006 | US20060091482 Metal oxide semiconductor (MOS) transistors having a recessed gate electrode and methods of fabricating the same |
05/04/2006 | US20060091481 Multi bridge channel field effect transistors with nano-wire channels and methods of manufacturing the same |
05/04/2006 | US20060091479 Applying epitaxial silicon in disposable spacer flow |
05/04/2006 | US20060091478 Semiconductor gate structure and method for preparing the same |
05/04/2006 | US20060091477 Process for producing a contact pad on a region of an integrated circuit, in particular on the electrodes of a transistor |
05/04/2006 | US20060091476 Sub-lithographic structures, devices including such structures, and methods for producing the same |
05/04/2006 | US20060091475 Semiconductor device |
05/04/2006 | US20060091474 Semiconductor device and manufacturing method thereof |
05/04/2006 | US20060091473 Semiconductor device, manufacturing method thereof, and CMOS integrated circuit device |
05/04/2006 | US20060091471 Technique for creating different mechanical strain in different channel regions by forming an etch stop layer stack having differently modified intrinsic stress |
05/04/2006 | US20060091470 Nonvolatile semiconductor memory device with twin-well |
05/04/2006 | US20060091469 Dual-gate structure and method of fabricating integrated circuits having dual-gate structures |
05/04/2006 | US20060091467 Resonant tunneling device using metal oxide semiconductor processing |
05/04/2006 | US20060091466 Nonvolatile semiconductor memory device |
05/04/2006 | US20060091462 Memory cell having an electrically floating body transistor and programming technique therefor |
05/04/2006 | US20060091460 Semiconductor devices and methods of making |
05/04/2006 | US20060091459 Semiconductor device having metal silicide and method of making the same |
05/04/2006 | US20060091458 Nonvolatile memory device and method of manufacturing the same |
05/04/2006 | US20060091457 Semiconductor device and method of manufacturing the same |
05/04/2006 | US20060091456 Trench MOSFET with deposited oxide |
05/04/2006 | US20060091455 Trench MOSFET and method of manufacturing same |
05/04/2006 | US20060091454 Semiconductor device and method of manufacturing the same |
05/04/2006 | US20060091453 Trench MIS device and method for manufacturing trench MIS device |
05/04/2006 | US20060091452 Self-aligned trench DMOS transistor structure and its manufacturing methods |
05/04/2006 | US20060091450 Dual function FinFET, finmemory and method of manufacture |
05/04/2006 | US20060091449 Stacked gate memory cell with erase to gate, array, and method of manufacturing |
05/04/2006 | US20060091448 Charge-trapping memory device and methods for operating and manufacturing the cell |
05/04/2006 | US20060091447 Semiconductor device and its manufacture method |
05/04/2006 | US20060091446 Non-volatile semiconductor memory device and its manufacturing method |
05/04/2006 | US20060091445 Semiconductor device and method for fabricating thereof |
05/04/2006 | US20060091444 Double word line memory structure and manufacturing method thereof |
05/04/2006 | US20060091443 Composite capacitor |
05/04/2006 | US20060091442 Out of the box vertical transistor for eDRAM on SOI |
05/04/2006 | US20060091441 Method to eliminate arsenic contamination in trench capacitors |
05/04/2006 | US20060091440 Memory device having molecular adsorption layer |
05/04/2006 | US20060091439 System and method for protecting semiconductor devices |
05/04/2006 | US20060091438 Semiconductor device and manufacturing method thereof |
05/04/2006 | US20060091437 Resistive memory device having array of probes and method of manufacturing the resistive memory device |
05/04/2006 | US20060091436 Methods of forming field effect transistors having metal silicide gate electrodes |
05/04/2006 | US20060091435 Organic electronic circuit and method for making the same |
05/04/2006 | US20060091434 Strain-engineered ferroelectric thin films |
05/04/2006 | US20060091433 Semiconductor integrated circuit device and manufacturing method thereof |
05/04/2006 | US20060091432 Damascene gate field effect transistor with an internal spacer structure |
05/04/2006 | US20060091431 Contact plug processing and a contact plug |
05/04/2006 | US20060091428 Structure and method for forming the gate electrode in a multiple-gate transistor |
05/04/2006 | US20060091427 Silicon-on-insulator semiconductor device with silicon layers having different crystal orientations and method of forming the silicon-on-insulator semiconductor device |
05/04/2006 | US20060091424 Semiconductor device and method of producing a semiconductor device |
05/04/2006 | US20060091423 Layer fill for homogenous technology processing |
05/04/2006 | US20060091417 Nitride semiconductor device |
05/04/2006 | US20060091411 High brightness LED package |
05/04/2006 | US20060091408 Nitride based semiconductor device using nanorods and process for preparing the same |
05/04/2006 | US20060091407 Multi-wavelength light receiving element and method of fabricating same |
05/04/2006 | US20060091404 Semiconductor light emitting devices with graded compositon light emitting layers |
05/04/2006 | US20060091403 Led module and method of packaging the same |
05/04/2006 | US20060091400 Composite structure with high heat dissipation |
05/04/2006 | US20060091399 Active matrix type organic light emitting diode device and fabrication method thereof |
05/04/2006 | US20060091398 Semiconductor device and method for manufacturing the same |
05/04/2006 | US20060091397 Display device and method for manufacturing the same |
05/04/2006 | US20060091396 Thin film transistor array panel and method for manufacturing the same |
05/04/2006 | US20060091395 Organic electroluminescent display device having OTFT and method of fabricating the same |
05/04/2006 | US20060091394 Semiconductor device and method for manufacturing the same |
05/04/2006 | US20060091393 Isotopically pure silicon-on-insulator wafers and methods of making same |
05/04/2006 | US20060091392 Electrically conductive structure, method of forming the same, an array substrate using the electrically conductive structure and a liquid crystal display panel including the electrically conductive structure |
05/04/2006 | US20060091391 Thin film transistor array panel and liquid crystal display including the panel |
05/04/2006 | US20060091390 Image pickup apparatus, radiation image pickup apparatus and radiation image pickup system |
05/04/2006 | US20060091389 Thin film transistor array panel |
05/04/2006 | US20060091388 Display device and method for manufacturing the same |
05/04/2006 | US20060091387 Semiconductor device |
05/04/2006 | US20060091386 Transistor and method for manufacturing the same |
05/04/2006 | US20060091385 Selectable application of offset to dynamically controlled voltage supply |
05/04/2006 | US20060091382 Low dielectric constant material having thermal resistance, insulation film between semiconductor layers using the same, and semiconductor device |
05/04/2006 | US20060091381 Organic electro-luminescence display device and fabricating method thereof |
05/04/2006 | US20060091380 Organic light-emitting device array and display |
05/04/2006 | US20060091379 High-temperature devices on insulator substrates |
05/04/2006 | US20060091378 Luminescent gold (III) compounds, their preparation, and light-emitting devices containing same |
05/04/2006 | US20060091377 Hetero-integrated strained silicon n-and p-MOSFETs |
05/04/2006 | US20060091376 Semiconductor light-emitting device with improved light extraction efficiency |
05/04/2006 | US20060091375 Systems and methods for quantum braiding |
05/04/2006 | US20060091374 Multibit phase change memory device and method of driving the same |
05/04/2006 | US20060091373 Method for programming a multilevel phase change memory device |
05/04/2006 | US20060091355 Solution and method for removing ashing residue in Cu/low-k multilevel interconnection structure |
05/04/2006 | US20060091105 Method for constraining a thin pattern |
05/04/2006 | DE19958151B4 Laterales Hochvolt-Halbleiterbauelement mit reduziertem spezifischen Einschaltwiderstand Lateral high voltage semiconductor device having a reduced specific on |
05/04/2006 | DE19720300B4 Elektronisches Hybrid-Bauelement und Verfahren zu seiner Herstellung Hybrid electronic device and process for its preparation |
05/04/2006 | DE19549202B4 Gleichrichterdiode Rectifier diode |
05/04/2006 | DE102005040512A1 Leistungsbauelemente mit auf Graben basierenden Source- und Gate-Elektroden Power devices having source and gate electrodes based trench |
05/04/2006 | DE102004052643A1 Lateral trench transistor has body region inside which a semiconductor region is provided which is electrically connected with source contact and its type of endowment corresponds to the type of endowment of body region |
05/04/2006 | DE102004052617A1 Halbleiterelement mit Halbleitergebieten, die unterschiedlich verformte Kanalgebiete aufweisen, und Verfahren zur Herstellung des Halbleiterelements Semiconductor element having semiconductor regions having different deformed channel regions, and methods for manufacturing the semiconductor element |
05/04/2006 | DE102004052610A1 Power transistor containing in its semiconductor volume several transistor cells in parallel, with lateral, highly conductive semiconductor layer buried under cells and at least one terminal |
05/04/2006 | DE102004052581A1 CMOS-Gatestruktur mit einem vordotierten Halbleitergatematerial mit verbesserter Gleichförmigkeit der Dotierstoffverteilung und Verfahren zur Herstellung der Struktur CMOS gate structure having a pre-doped semiconductor gate material with improved uniformity of the dopant distribution and method for making the structure |
05/04/2006 | DE102004052388A1 Halbleiterbauelement sowie zugehöriges Herstellungsverfahren Semiconductor device and manufacturing method thereof |
05/04/2006 | DE10131237B4 Feldeffekttrasistor und Verfahren zu seiner Herstellung Feldeffekttrasistor and process for its preparation |
05/04/2006 | DE10008570B4 Kompensations-Halbleiterbauelement Compensation semiconductor component |
05/03/2006 | EP1653525A1 Method of manufacturing micro tunnel-junction circuit and micro tunnel-junction circuit |
05/03/2006 | EP1653518A2 Method of manufacturing a Zener zap diode compatible with tungsten plug technology |
05/03/2006 | EP1653514A1 Semiconductor device and process for producing the same |
05/03/2006 | EP1653507A1 High-heat-resistant semiconductor device |