| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 04/05/1994 | US5300824 Integrated circuit with improved on-chip power supply control |
| 04/05/1994 | US5300823 Internal voltage dropping circuit for semiconductor device |
| 04/05/1994 | US5300799 Nonvolatile semiconductor storage device with ferroelectric capacitors |
| 03/31/1994 | WO1994007244A1 Magnetoresistive memory structure large fraction utilization |
| 03/31/1994 | DE4332618A1 Burn-in test circuit for semiconductor memory - has internal voltage generator switched to firing test mode by output signal of firing sensor |
| 03/31/1994 | DE4332583A1 Clock signal clamping circuit for semiconductor memory device - controls switching through of clock signal dependent on charged bit line bias voltage setting signal and power signal |
| 03/31/1994 | DE4331895A1 Reference voltage clamping circuit e.g. for semiconductor memory - uses constant current circuit to supply reference voltage to clamping transistor control electrode |
| 03/29/1994 | US5299169 Multiport memory device comprising random access port and serial access port |
| 03/29/1994 | US5299168 Circuit for detecting refresh address signals of a semiconductor memory device |
| 03/29/1994 | US5299167 Bipolar ram apparatus |
| 03/29/1994 | US5299165 Semiconductor memory having one-transistor/one-capacitor memory cells and having both improved noise ratio and high density integration |
| 03/29/1994 | US5299164 Semiconductor memory device having redundant circuit |
| 03/29/1994 | US5299161 Method and device for improving performance of a parallel write test of a semiconductor memory device |
| 03/29/1994 | US5299160 Semiconductor memory device capable of repairing defective bits |
| 03/29/1994 | US5299159 Serial register stage arranged for connection with a single bitline |
| 03/29/1994 | US5299158 Memory device with multiple read ports |
| 03/29/1994 | US5299157 Semiconductor memories with serial sensing scheme |
| 03/29/1994 | US5299156 Dual port static RAM with bidirectional shift capability |
| 03/29/1994 | US5299155 Dynamic random access memory device with capacitor between vertically aligned FETs |
| 03/29/1994 | US5299154 MOS semiconductor device with memory cells each having storage capacitor and transfer transistor |
| 03/29/1994 | US5299147 Decoder scheme for fully associative translation-lookaside buffer |
| 03/29/1994 | US5298816 Write circuit for CMOS latch and memory systems |
| 03/29/1994 | US5298815 Cascode amplifier circuitry for amplifying differential signals |
| 03/29/1994 | US5298433 Method for testing semiconductor devices |
| 03/24/1994 | DE4332084A1 Semiconductor memory device, e.g. SRAM with high read=out rate - with controlled potentials applied to bit line pair during active status of address change identification signal |
| 03/24/1994 | DE4331542A1 Input circuit for integrated semiconductor device - provides difference between level shifted versions of binary input signal and reference voltage |
| 03/24/1994 | DE4330778A1 Memory cell circuit for multiport memory device - has MOS transistors in series between bit line and ground with gates connected to output or input of NAND=gate |
| 03/23/1994 | EP0588503A2 Integrated circuit magnetic memory element and method of making same |
| 03/23/1994 | EP0588486A2 Bi-channel electrode configuration for an addressing structure using an ionizable gaseous medium and method of operating it |
| 03/23/1994 | EP0588250A2 PSRAM refresh controller |
| 03/23/1994 | EP0588129A2 Semiconductor memory device |
| 03/23/1994 | EP0588111A2 Memory element |
| 03/23/1994 | EP0587931A1 CMOS buffer circuit |
| 03/23/1994 | EP0357749B1 Bipolar ram with no write recovery time |
| 03/23/1994 | EP0354950B1 Bipolar ram having state dependent write current |
| 03/22/1994 | US5297148 Memory card connectable to a computer system |
| 03/22/1994 | US5297105 Semiconductor memory circuit |
| 03/22/1994 | US5297104 Word line drive circuit of semiconductor memory device |
| 03/22/1994 | US5297102 Semiconductor memory device storing data and parity bit |
| 03/22/1994 | US5297098 Control apparatus for data storage apparatus |
| 03/22/1994 | US5297097 Large scale integrated circuit for low voltage operation |
| 03/22/1994 | US5297094 Integrated circuit memory device with redundant rows |
| 03/22/1994 | US5297091 Early row address strobe (RAS) precharge |
| 03/22/1994 | US5297090 Semiconductor memory with column decoded bit line equilibrate |
| 03/22/1994 | US5297089 Balanced bit line pull up circuitry for random access memories |
| 03/22/1994 | US5297085 Semiconductor memory device with redundant block and cell array |
| 03/22/1994 | US5297080 Sense amplifier in semiconductor memory device |
| 03/22/1994 | US5297078 Static semiconductor memory device for stable operation |
| 03/22/1994 | US5297077 Memory having ferroelectric capacitors polarized in nonvolatile mode |
| 03/22/1994 | US5296835 Variable resistor and neuro device using the variable resistor for weighting |
| 03/22/1994 | US5296755 High speed BI CMOS logic circuit and a semiconductor integrated circuit device using same |
| 03/22/1994 | US5296716 Electrically erasable, directly overwritable, multibit single cell memory elements and arrays fabricated therefrom |
| 03/17/1994 | WO1994006120A1 Coincident activation of pass transistors in a random access memory |
| 03/17/1994 | WO1994006082A1 Memory circuit with redundancy architecture |
| 03/17/1994 | DE4330600A1 Variable delay stage for clock pulse source - has delay assembly with sequential delay units, with only some linked to signal transmission line |
| 03/17/1994 | CA2141860A1 Coincident activation of pass transistors in a random access memory |
| 03/16/1994 | EP0587443A2 Image processor and method |
| 03/16/1994 | EP0523043B1 Memory cell with active write load |
| 03/16/1994 | CN1083971A Burn-in enable circuit of a semiconductor memory device and burn-in test method thereof |
| 03/16/1994 | CN1024056C Storage elements of using pottery superconductive elements |
| 03/15/1994 | US5295254 Semiconductor memory device cell array divided into a plurality of blocks |
| 03/15/1994 | US5295117 Semiconductor memory device and method for controlling an output buffer utilizing an address transition detector |
| 03/15/1994 | US5295116 Row address decoder and word line driver unit with pull-down transistors operable in saturation region for rapidly driving word lines |
| 03/15/1994 | US5295115 Addressing system free from multi-selection of word lines |
| 03/15/1994 | US5295114 Semiconductor memory device with redundant circuit for rescuing from rejection due to large current consumption |
| 03/15/1994 | US5295111 Dynamic random access memory device with improved power supply system for speed-up of rewriting operation on data bits read-out from memory cells |
| 03/15/1994 | US5295110 Semiconductor memory device incorporated with self-refresh circuit |
| 03/15/1994 | US5295109 Semiconductor memory |
| 03/15/1994 | US5295103 Read/write circuit including sense amplifiers for use in a dynamic RAM |
| 03/15/1994 | US5295102 Semiconductor memory with improved redundant sense amplifier control |
| 03/15/1994 | US5295101 Array block level redundancy with steering logic |
| 03/15/1994 | US5295100 Method for providing a faster ones voltage level restore operation in a DRAM |
| 03/15/1994 | US5295099 Dynamic random access memory device having static column mode of operation without destruction of data bit |
| 03/15/1994 | US5295098 Semiconductor memory device having high-speed three-state data output buffer circuit without voltage fluctuation on power voltage lines |
| 03/15/1994 | US5295097 Nonvolatile random access memory |
| 03/15/1994 | US5295094 Memory circuit |
| 03/15/1994 | US5295093 Polarity-convertible Josephson driver circuit |
| 03/15/1994 | US5294776 Method of burning in a semiconductor device |
| 03/10/1994 | DE4326822A1 Static RAM integrated circuit for memory or photosensor - uses two complementary layers of Silicon-On-Insulator transistors or other silicon thin film construction |
| 03/10/1994 | DE4324649A1 Fast, low power DRAM sense amplifier - uses current mirror and complementary CMOS FET's for improved speed and low power. |
| 03/09/1994 | EP0585870A2 Dynamic random access memory with voltage stress applying circuit |
| 03/09/1994 | EP0585505A1 Low noise buffer |
| 03/09/1994 | CN1023955C Low power, TTL level CMOS imput buffer with hysteresis |
| 03/08/1994 | US5293607 Digital system |
| 03/08/1994 | US5293564 Address match scheme for DRAM redundancy scheme |
| 03/08/1994 | US5293563 Multi-level memory cell with increased read-out margin |
| 03/08/1994 | US5293560 Multi-state flash EEPROM system using incremental programing and erasing methods |
| 03/08/1994 | US5293515 Amplifier circuit having two inverters |
| 03/08/1994 | US5293458 MOS Multi-layer neural network and its design method |
| 03/08/1994 | US5293348 Random access memory device with columns of redundant memory cells distributed to memory cell arrays and shared therebetween |
| 03/08/1994 | US5293347 Semiconductor memory device having read/write operation improved in pipe line processing |
| 03/08/1994 | US5293343 Dynamic semiconductor memory having a read amplifier drive circuit for achieving short access times with a low total peak current |
| 03/08/1994 | US5293342 Wordline driver circuit having an automatic precharge circuit |
| 03/08/1994 | US5293341 Semiconductor memory having a test function |
| 03/08/1994 | US5293340 Dynamic random access memory device with multiple word line selector used in burn-in test |
| 03/08/1994 | US5293338 Peripheral circuit in a dynamic semiconductor memory device enabling a time-saving and energy-saving data readout |
| 03/08/1994 | US5293336 Semiconductor memory device and method for manufacturing the same |
| 03/08/1994 | US5293334 Pattern layout of power source lines in semiconductor memory device |
| 03/08/1994 | US5293332 Semiconductor memory device with switchable sense amps |
| 03/08/1994 | US5293055 Semiconductor integrated circuit device |