| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 04/27/1994 | EP0594266A2 SRAM with flash clear for selectable I/Os |
| 04/27/1994 | EP0594230A1 High efficiency n-channel charge pump |
| 04/26/1994 | US5307381 Skew-free clock signal distribution network in a microprocessor |
| 04/26/1994 | US5307356 Interlocked on-chip ECC system |
| 04/26/1994 | US5307324 Semiconductor memory device including address transition detecting circuit |
| 04/26/1994 | US5307323 Dual-port memory |
| 04/26/1994 | US5307322 Memory cell for use in a multi-port RAM |
| 04/26/1994 | US5307321 Semiconductor memory device with particular bank selector means |
| 04/26/1994 | US5307320 High integration DRAM controller |
| 04/26/1994 | US5307319 Initialization setting circuit and semiconductor memory device using the same |
| 04/26/1994 | US5307318 Semiconductor integrated circuit device having main power terminal and backup power terminal independently of each other |
| 04/26/1994 | US5307317 Semiconductor memory device having improved access to addresses |
| 04/26/1994 | US5307316 Semiconductor memory unit having redundant structure |
| 04/26/1994 | US5307315 Integrated semiconductor memory with internal voltage booster of lesser dependency on power supply voltage |
| 04/26/1994 | US5307314 Split read/write dynamic random access memory |
| 04/26/1994 | US5307311 Microvibratory memory device |
| 04/26/1994 | US5307308 Semiconductor memory device comprising one or more high-resistance elements |
| 04/26/1994 | US5307307 Semiconductor memory device having improved bit line arrangement |
| 04/26/1994 | US5307305 Semiconductor device having field effect transistor using ferroelectric film as gate insulation film |
| 04/26/1994 | US5307304 Semiconductor memory device and method of operation thereof |
| 04/26/1994 | US5307142 High performance static latches with complete single event upset immunity |
| 04/26/1994 | US5306960 Common bias circuit for a plurality of discrete IC's each having their own bias circuritry |
| 04/21/1994 | DE2760461C2 Semiconductor memory unit with matrix array |
| 04/20/1994 | EP0593319A1 Memory integrated circuit with protection against disturbances |
| 04/20/1994 | EP0592688A1 Dynamic ram |
| 04/19/1994 | US5305284 Semiconductor memory device |
| 04/19/1994 | US5305283 Dram column address latching technique |
| 04/19/1994 | US5305282 In a semiconductor memory device |
| 04/19/1994 | US5305281 Multiple array memory device with staggered read/write for high speed data access |
| 04/19/1994 | US5305280 Semiconductor memory device having on the same chip a plurality of memory circuits among which data transfer is performed to each other and an operating method thereof |
| 04/19/1994 | US5305279 Semiconductor memory device having word line selection logic circuits |
| 04/19/1994 | US5305278 Semiconductor memory device having block write function |
| 04/19/1994 | US5305276 Non-volatile IC memory |
| 04/19/1994 | US5305274 Method and apparatus for refreshing a dynamic random access memory |
| 04/19/1994 | US5305272 Sense amplifier circuit |
| 04/19/1994 | US5305271 Circuit for controlling an output of a semiconductor memory |
| 04/19/1994 | US5305270 Initial setup circuit for charging cell plate |
| 04/19/1994 | US5305269 Differential latching inverter and random access memory using same |
| 04/19/1994 | US5305268 Semiconductor memory with column equilibrate on change of data during a write cycle |
| 04/19/1994 | US5305267 Semiconductor memory device adapted for preventing a test mode operation from undesirably occurring |
| 04/19/1994 | US5305266 High speed parallel test architecture |
| 04/19/1994 | US5305264 Static type random access memory device equipped with variable load circuits for digit line pairs |
| 04/19/1994 | US5305263 Simplified low power flash write operation |
| 04/19/1994 | US5305261 Semiconductor memory device and method of testing the same |
| 04/19/1994 | US5305260 Electrically erasable and programmable read only memory device verifiable with standard external power voltage level |
| 04/19/1994 | US5305259 Power source voltage tracking circuit for stabilization of bit lines |
| 04/19/1994 | US5305258 Semiconductor memory and memory cell |
| 04/19/1994 | US5305256 Semiconductor memory device having stacked capacitor cell |
| 04/19/1994 | US5305255 Non-destructive readout ferroelectric memory cell |
| 04/19/1994 | US5304918 Reference circuit for high speed integrated circuits |
| 04/19/1994 | US5304874 Differential latching inverter and random access memory using same |
| 04/19/1994 | US5304868 Non-inverting buffer circuit device and semiconductor memory circuit device |
| 04/19/1994 | US5304859 Substrate voltage generator and method therefor in a semiconductor device having internal stepped-down power supply voltage |
| 04/19/1994 | US5304857 Pulse generating circuit for semiconductor device |
| 04/19/1994 | US5304505 Process for EEPROM cell structure and architecture with increased capacitance and with programming and erase terminals shared between several cells |
| 04/14/1994 | DE4334263A1 Back bias voltage generator for semiconductor memory device - has two Vbb generator with oscillator generating clock pulse, and several Vbb sub-generators |
| 04/14/1994 | DE4333767A1 Stabilised voltage generating circuit with comparator - adjusts current magnitude flowing from voltage supply mode to output mode in response to voltage comparison |
| 04/14/1994 | DE4333765A1 Semiconductor memory, e.g. DRAM with time-controlled address transition detector - provides for delayed activation of detector after time defined by end-of-read=out signal in response to external control |
| 04/14/1994 | DE4201516C2 Schaltungsanordnung zum Bewirken eines Streßtests bei einer Halbleiterspeichervorrichtung A circuit arrangement for effecting a stress test in a semiconductor memory device |
| 04/13/1994 | EP0591850A2 Semiconductor memory device |
| 04/13/1994 | EP0591819A1 Improved semiconductor memory device including memory cells connected to a ground line |
| 04/13/1994 | EP0591811A2 Dynamic random access memory device having a parallel testing mode for producing arbitrary test pattern |
| 04/13/1994 | EP0591776A2 Semiconductor memory device having address transition detector quickly enabling redundancy decoder |
| 04/13/1994 | EP0591752A2 Multiport memory |
| 04/13/1994 | EP0591751A2 Semiconductor memory device |
| 04/13/1994 | EP0524924B1 Memory cell with active write load |
| 04/12/1994 | US5303196 Dynamic random access memory device |
| 04/12/1994 | US5303195 Transducer system |
| 04/12/1994 | US5303193 Semiconductor device |
| 04/12/1994 | US5303191 Memory with compensation for voltage, temperature, and processing variations |
| 04/12/1994 | US5303190 Static random access memory resistant to soft error |
| 04/12/1994 | US5303185 EEPROM cell structure and architecture with increased capacitance and with programming and erase terminals shared between several cells |
| 04/12/1994 | US5303183 Semiconductor memory device |
| 04/12/1994 | US5303182 Nonvolatile semiconductor memory utilizing a ferroelectric film |
| 04/12/1994 | US5302870 Apparatus for providing multi-level potentials at a sense node |
| 04/12/1994 | US5302867 Apparatus for sensing data in data bus lines |
| 04/06/1994 | EP0591009A2 Semiconductor memory |
| 04/06/1994 | EP0591008A2 Data output buffers in semiconductor memory devices |
| 04/06/1994 | EP0590982A2 Stress test for memory arrays in integrated circuits |
| 04/06/1994 | EP0590651A2 Dynamic random access memory device having power supply system appropriately biasing switching transistors and storage capacitors in burn-in testing process |
| 04/06/1994 | EP0590608A2 Semiconductor memory device with redundancy |
| 04/06/1994 | EP0590591A2 Static random access memory for gate array devices |
| 04/06/1994 | EP0590319A2 A non-volatile memory cell |
| 04/06/1994 | EP0541684B1 Bit storage cell |
| 04/06/1994 | CN1085004A Current sensing circuit of a semiconductor memory device |
| 04/05/1994 | US5301305 Apparatus for amplifying signals in ping-pong arrangement to reduce the frequency of amplification |
| 04/05/1994 | US5301278 Flexible dynamic memory controller |
| 04/05/1994 | US5301165 Chip select speedup circuit for a memory |
| 04/05/1994 | US5301164 Control circuit for controlling an operation mode in a pseudo-static ram |
| 04/05/1994 | US5301163 Memory selection/deselection circuitry having a wordline discharge circuit |
| 04/05/1994 | US5301162 Semiconductor random access memory device having shared sense amplifiers serving as a cache memory |
| 04/05/1994 | US5301158 Data reading circuit including a current sensing amplifier circuit |
| 04/05/1994 | US5301156 Configurable self-test for embedded RAMs |
| 04/05/1994 | US5301152 Semiconductor memory device equipped with sense amplifier circuit which eliminates a transient pulse at an output data terminal |
| 04/05/1994 | US5301148 Semiconductor memory device with bipolar-FET sense amp |
| 04/05/1994 | US5301147 Static random access memory cell with single logic-high voltage level bit-line and address-line drivers |
| 04/05/1994 | US5301146 Memory cell of SRAM used in environmental conditions of high-energy particle irradiation |
| 04/05/1994 | US5301142 Semiconductor memory |
| 04/05/1994 | US5300839 Semiconductor IC device having sense amplifier circuit |
| 04/05/1994 | US5300833 Low voltage biCMOS circuit having ECL and TTL input buffers and no intervening level-shift circuits |