Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
08/1993
08/17/1993US5237217 Decoder circuit with a differential amplifier and applications thereof
08/11/1993EP0554901A2 A semiconductor memory device
08/11/1993EP0554489A1 Multi-port static random access memory with fast write-thru scheme
08/10/1993US5235699 Timing calibrate and track control circuit
08/10/1993US5235694 Multi i/o device system using temporary store of ram data when associated communicating i/o devices are operating at various clocking phases
08/10/1993US5235691 Main memory initializing system
08/10/1993US5235552 Semiconductor memory device and method of reading data therefrom
08/10/1993US5235550 Method for maintaining optimum biasing voltage and standby current levels in a DRAM array having repaired row-to-column shorts
08/10/1993US5235547 Semiconductor memory device with sense amplifier unit as well as data register/pointer shared between plural memory cell arrays
08/10/1993US5235546 Semiconductor memory device having transfer gate array associated with monitoring circuit for bit line pair
08/04/1993EP0554183A2 Static RAM
08/04/1993EP0554055A2 A semiconductor memory with improved redundant sense amplifier control
08/04/1993EP0554054A2 Column redundancy architecture for a read/write memory
08/04/1993EP0554053A2 A semiconductor memory with a multiplexer for selecting an output for a redundant memory access
08/04/1993EP0554052A2 Redundancy decoder
08/04/1993EP0553993A2 Dual-port memory with read and read/write ports
08/04/1993EP0553938A2 Recording device and reproducing device
08/04/1993EP0553937A2 Recording device and reproducing device
08/04/1993EP0553788A2 Semiconductor memory device incorporating redundancy memory cells having parallel test function
08/04/1993EP0553547A2 Strobe signals in semiconductor memory devices
08/04/1993CN1075025A Semiconductor memory device having a plurality of rwo address strobe signals
08/03/1993US5233561 Composite semiconductor storage device and operating method therefor
08/03/1993US5233560 Dynamic memory bit line precharge scheme
08/03/1993US5233558 Semiconductor memory device capable of directly reading the potential of bit lines
08/03/1993US5233557 Memory control device
08/03/1993US5233556 Optoelectronic memory and logic device
08/03/1993US5233240 Semiconductor decoding device comprising an mos fet for discharging an output terminal
07/1993
07/28/1993EP0552964A2 Reference circuit
07/28/1993EP0552667A1 Enhanced dram with embedded registers
07/28/1993EP0552625A2 Memory with compensation for voltage, temperature, and processing variations
07/28/1993EP0552426A1 Multilevel memory system
07/28/1993EP0552404A1 Circuit to limit the output voltage of a voltage boosting circuit
07/27/1993US5231607 Semiconductor memory device
07/27/1993US5231604 Semiconductor memory device having column redundancy system
07/22/1993WO1993014521A1 Eeprom with split gate source side injection
07/21/1993EP0551965A2 Recording device and reproducing device
07/21/1993EP0551926A1 Nonvolatile semiconductor memory device
07/21/1993EP0551756A1 Memory cell with ferro-electric capacitors
07/21/1993EP0551598A2 Boosted drive system for master/local word line memory architecture
07/21/1993EP0551419A1 Integrated circuit systems and method for analog signal recording and playback
07/20/1993US5229971 Semiconductor memory device
07/20/1993US5229970 Circuit for synchronizing refresh cycles in self-refreshing drams having timing circuit shutdown
07/20/1993US5229969 Method for synchronizing refresh cycles in self-refreshing DRAMs having timing circuit shutdown
07/20/1993US5229967 BICMOS sense circuit for sensing data during a read cycle of a memory
07/20/1993US5229966 Current control circuit for dynamic memory
07/20/1993US5229965 Serial accessible semiconductor memory device
07/20/1993US5229964 Read circuit for large-scale dynamic random access memory
07/20/1993US5229962 Buffered nondestructive-readout Josephson memory cell with three gates
07/20/1993US5229961 Crosstie random access memory element having associated read/write circuitry
07/20/1993US5229659 Low power complementary mosfet digital signal buffer circuit
07/20/1993US5229623 Electric circuit using multiple differential negative resistance elements, semiconductor device and neuro chip using the same
07/20/1993CA1320576C Semiconductor memory circuit
07/20/1993CA1320544C Speed enhancement technique for cmos circuits
07/14/1993EP0287303B1 Scan test apparatus for digital systems having dynamic random access memory
07/13/1993US5228134 Cache memory integrated circuit for use with a synchronous central processor bus and an asynchronous memory bus
07/13/1993US5228132 Memory module arranged for data and parity bits
07/13/1993US5227999 Semiconductor memory device capable of replacing faulty bit lines with redundant bit lines
07/13/1993US5227998 Fast static random access memory
07/13/1993US5227997 Semiconductor circuit device having multiplex selection functions
07/13/1993US5227996 Semiconductor memory device having word line driver
07/13/1993US5227993 Multivalued ALU
07/13/1993US5227865 BiCMOS sense amplifier having input waiting state
07/13/1993US5227697 Dynamic type semiconductor memory
07/13/1993US5227675 Voltage generator for a semiconductor integrated circuit
07/08/1993WO1993013529A1 Optical random access memory
07/08/1993WO1993013481A1 Interleaved cache for multiple accesses per clock in a microprocessor
07/08/1993CA2127101A1 Optical random access memory
07/07/1993EP0549633A1 Improved memory system
07/07/1993EP0549623A1 Dynamic semiconductor memory with local read amplifier drive circuit with optimised control function.
07/07/1993EP0549611A1 Dynamic semiconductor store with read amplifier tuning circuit to obtain short access times at a low total peak current.
07/06/1993US5226139 Semiconductor memory device with a built-in cache memory and operating method thereof
07/06/1993US5226136 Memory cartridge bank selecting apparatus
07/06/1993US5226011 Static type RAM
07/06/1993US5226009 Semiconductor memory device supporting cache and method of driving the same
07/06/1993US5226008 Dynamic random access memory allowing determination of a read/write control type at the final step of manufacturing process
07/06/1993US5225717 BiCMOS input buffer circuit operable at high speed under less power consumption
07/01/1993DE4243907A1 Back bias voltage generating circuit for CMOS semiconductor device - has oscillator circuit delivering control signals for pair of pumping stages in parallel
07/01/1993DE4243903A1 Word line voltage supply circuit for semiconductor memory, e.g. DRAM - provides voltage on word line at instigation of driver regulator, reset level converter and row decoder
06/1993
06/30/1993EP0549218A1 A memory apparatus and method for use in a data processing system
06/30/1993EP0548964A2 Combination DRAM and SRAM memory array
06/30/1993EP0548905A2 Atomic devices and logical circuits and method of manufacturing the same
06/30/1993EP0548894A2 DRAM interface adapter circuit
06/30/1993EP0548094A1 Active storage means in a reduction processor
06/30/1993CN1021493C Erasable access storage unit
06/29/1993US5224104 Real-time address switching circuit
06/29/1993US5224071 Addressable memory unit having an improved unit selection circuit
06/29/1993US5224069 Ferroelectric capacitor memory circuit MOS setting and transmission transistors
06/29/1993US5224066 Method and apparatus for parallel implementation of neural networks
06/29/1993US5223752 Level conversion circuit for converting ecl-level signals into mos-level signals and address signal decoding system having the level conversion circuit
06/29/1993US5223750 Artificial neural function circuit having organic thin film elements
06/29/1993US5223744 Semiconductor integrated circuit with circuits for generating stable reference potential
06/24/1993DE4232818A1 Redundant memory access circuit for dynamic random access memory - responds to defective main memory cell address to select redundant memory cell and isolate corresponding data bus
06/23/1993EP0547919A2 A semiconductor memory with power-on reset control of disabled rows
06/23/1993EP0547892A2 An integrated circuit with self-biased differential data lines
06/23/1993EP0547891A2 A precharging output driver circuit
06/23/1993EP0547889A2 A tristatable driver for internal data bus lines
06/23/1993EP0547758A2 Optional refresh
06/23/1993EP0547673A2 Semiconductor device comprising at least one memory cell
06/23/1993EP0547333A1 Semiconductor circuits
06/22/1993USRE34290 Constant voltage generating circuit