Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
11/1994
11/22/1994US5367495 Semiconductor memory
11/22/1994US5367494 Randomly accessible memory having time overlapping memory accesses
11/22/1994US5367493 Dynamic type semiconductor memory device having reduced peak current during refresh mode and method of operating the same
11/22/1994US5367492 Semiconductor memory device providing reduced test time
11/22/1994US5367491 Apparatus for automatically initiating a stress mode of a semiconductor memory device
11/22/1994US5367489 Voltage pumping circuit for semiconductor memory devices
11/22/1994US5367488 DRAM having bidirectional global bit lines
11/22/1994US5367487 Semiconductor memory device
11/22/1994US5367486 Semiconductor memory device capable of correctly and serially reading stored data signals
11/22/1994US5367485 Semiconductor memory device including output latches for improved merging of output data
11/22/1994US5367482 High voltage random-access memory cell incorporation level shifter
11/22/1994US5367481 Dynamic random access memory with complementary bit lines and capacitor common line
11/22/1994US5367480 Semiconductor memory
11/22/1994US5367213 P-channel sense amplifier pull-up circuit incorporating a voltage comparator for use in DRAM memories having non-bootstrapped word lines
11/17/1994EP0624879A1 Single clock memory having a page mode
11/17/1994EP0624844A2 Fully integrated cache architecture
11/17/1994DE4415954A1 Datenspeichervorrichtung mit mehreren Eingängen mit verbesserter Zellenstabilität A data storage device with multiple inputs with improved cell stability
11/16/1994CN1095189A Boosting circuit device capable of pre-pumping and semiconducotr memory device
11/15/1994US5365489 Dual port video random access memory with block write capability
11/15/1994US5365488 Data reading circuit having a clamping circuit for clamping a pair of data buses to predetermined potentials
11/15/1994US5365487 DRAM power management with self-refresh
11/15/1994US5365483 Random access memory architecture including primary and signal bit lines and coupling means therefor
11/15/1994US5365482 Semiconductor memory device with provision of pseudo-acceleration test
11/15/1994US5365481 Semiconductor memory device having test mode and method of setting test mode
11/15/1994US5365478 Semiconductor memory
11/15/1994US5365476 Three-port Josephson memory cell for superconducting digital computer
11/15/1994US5365475 Semiconductor memory device usable as static type memory and read-only memory and operating method therefor
11/15/1994US5364806 Method of making a self-aligned dual-bit split gate (DSG) flash EEPROM cell
11/09/1994EP0623932A2 Soft error immune CMOS static RAM cell
11/09/1994EP0623931A2 Semiconductor synchronous memory device having input circuit for producing constant main control signal operative to allow timing generator to latch command signals
11/09/1994EP0623930A1 Semiconductor integrated circuit having a function of reducing a consumed current
11/09/1994CN1094840A Dynamic ram
11/08/1994US5363340 Semiconductor memory
11/08/1994US5363339 Semiconductor memory device
11/08/1994US5363338 Word line driving circuit for dynamic RAM
11/08/1994US5363336 Semiconductor memory device controlling the supply voltage on BIT lines
11/08/1994US5363333 Dynamic random access memory device having power supply system appropriately biasing switching transistors and storage capacitors in burn-in testing process
11/08/1994US5363331 Semiconductor memory with column line control circuits for protection against broken column lines
11/08/1994US5363328 Highly stable asymmetric SRAM cell
11/08/1994US5363325 Dynamic semiconductor memory device having high integration density
11/08/1994US5363001 Data input register for random access memory
11/08/1994CA2000995C Wordline voltage boosting circuits for complementary mosfet dynamic memories
11/02/1994EP0622809A1 Method for stress testing decoders and periphery circuits in memory arrays
11/02/1994EP0622808A1 Programming procedure and device for electrically reprogrammable non volatile memory and unit having such a device
11/02/1994EP0622803A2 Address buffer
11/02/1994EP0622801A2 Hierarchical bitline memory architecture
11/02/1994EP0622800A2 Semiconductor memory device
11/02/1994EP0225924B1 Electronic memory element with a lambda transistor
11/01/1994US5361339 Circuit for fast page mode addressing of a RAM with multiplexed row and column address lines
11/01/1994US5361237 Semiconductor memory device provided with a word-line driver circuit using boosted voltage-source divided decoding
11/01/1994US5361236 Serial access memory
11/01/1994US5361233 Semiconductor memory apparatus
11/01/1994US5361232 CMOS static RAM testability
11/01/1994US5361231 Dynamic random access memory device with redundant word lines shared between memory cell arrays
11/01/1994US5361226 Magnetic thin film memory device
11/01/1994US5361225 Nonvolatile memory device utilizing field effect transistor having ferroelectric gate film
11/01/1994US5361224 Nonvolatile memory device having ferroelectric film
11/01/1994US5361223 Semiconductor memory device comprising a plurality of memory arrays with improved peripheral circuit location and interconnection arrangement
11/01/1994US5361033 On chip bi-stable power-spike detection circuit
11/01/1994US5361000 Reference potential generating circuit
10/1994
10/27/1994WO1994024707A1 Electrically erasable, directly overwritable, multibit single cell memory elements and arrays fabricated therefrom
10/27/1994WO1994024672A1 Circuit for decoding variable-length code, and system for decoding variable-length code which uses the circuit
10/27/1994DE4412419A1 Phase-locked circuit and integrated circuit device
10/26/1994EP0621730A2 Dual memory buffer scheme for providing multiple data streams from stored data
10/26/1994EP0621694A2 Low power interface circuit
10/26/1994EP0621602A2 Random access memory
10/26/1994EP0621601A1 Processor circuit with memory refresh
10/26/1994EP0621537A2 Structure to recover a portion of a partially functional embedded memory
10/25/1994US5359726 Ferroelectric storage device used in place of a rotating disk drive unit in a computer system
10/25/1994US5359722 Method for shortening memory fetch time relative to memory store time and controlling recovery in a DRAM
10/25/1994US5359572 Semiconductor storage device
10/25/1994US5359566 Dynamic random access memory
10/25/1994US5359565 Optical memory
10/25/1994US5359562 Semiconductor memory having polycrystalline silicon load resistors and CMOS peripheral circuitry
10/25/1994US5359561 Semiconductor memory device
10/25/1994US5359559 Semiconductor memory device having redundant memory cells
10/25/1994US5359557 Dual-port array with storage redundancy having a cross-write operation
10/25/1994US5359556 Semiconductor memories with serial sensing scheme
10/25/1994US5359552 Power supply tracking regulator for a memory array
10/25/1994US5359215 Semiconductor memory cell for holding data with small power consumption
10/25/1994US5359205 Electrically erasable memory elements characterized by reduced current and improved thermal stability
10/19/1994EP0620573A2 Flux spreading thin film magnetic devices
10/19/1994EP0620555A2 Electronic device having ferroelectric memory
10/19/1994EP0619915A1 Optical random access memory
10/18/1994US5357530 Data output control circuit
10/18/1994US5357480 Address change detecting system for a memory
10/18/1994US5357479 Static random access memory capable of preventing erroneous writing
10/18/1994US5357478 Semiconductor integrated circuit device including a plurality of cell array blocks
10/18/1994US5357474 Semiconductor memory device
10/18/1994US5357470 Semiconductor memory device having redundancy memory cells
10/18/1994US5357469 Method for data transfer for a semiconductor memory using combined control signals to provide high speed transfer, and semiconductor memory for carrying out the method
10/18/1994US5357468 Semiconductor memory device
10/18/1994US5357464 Semiconductor memory having writing and reading transistors, method of fabrication thereof, and method of use thereof
10/18/1994US5357461 Output unit incorporated in semiconductor integrated circuit for preventing semiconductor substrate from fluctuating in voltage level
10/18/1994US5357460 Semiconductor memory device having two transistors and at least one ferroelectric film capacitor
10/18/1994US5357459 Nonvolatile capacitor random access memory
10/18/1994US5357416 Voltage generating circuit causing no threshold voltage loss by FET in output voltage
10/18/1994US5357193 Semiconductor memory having a voltage stress applying circuit
10/13/1994WO1994023353A1 Apparatus and method for adjusting the threshold voltage of mos transistors
10/13/1994DE4411874A1 Write-signal input buffer in an integrated semiconductor circuit