Patents
Patents for G06F 5 - Methods or arrangements for data conversion without changing the order or content of the data handled (8,116)
05/2008
05/01/2008US20080104154 Normalization processing apparatus
05/01/2008US20080102944 Player action incentive arrangement for gaming systems
04/2008
04/30/2008EP1665030B1 Circuit for addressing a memory
04/30/2008DE102006049263A1 Data i.e. multimedia data, handling method, involves storing data with dictionary-based algorithm in permanent memory of embedded device i.e. control module, in compressed manner and decompressing data in volatile memory
04/30/2008CN100385387C Method for increasing RAM utilizing efficiency
04/29/2008US7366943 Low-latency synchronous-mode sync buffer circuitry having programmable margin
04/29/2008US7366930 System and method for successfully negotiating a slowest common link speed between a first and second device
04/29/2008US7366816 Method and apparatus for adaptively adjusting the bandwidth of a data transmission channel having multiple buffered paths
04/29/2008US7366805 Data transfer control system, electronic instrument, program, and data transfer control method
04/29/2008US7366802 Method in a frame based system for reserving a plurality of buffers based on a selected communication protocol
04/29/2008US7366749 Floating point adder with embedded status information
04/25/2008CA2606361A1 Serializable objects and a database thereof
04/24/2008US20080094002 Intelligent Electrical Switching Device
04/23/2008CN100383727C Galois field linear transformer
04/22/2008US7363401 Method and apparatus for controlling bus transactions depending on bus clock frequency
04/22/2008US7363281 Reduction of fitness evaluations using clustering techniques and neural network ensembles
04/17/2008US20080091869 High speed, low current consumption fifo circuit
04/17/2008US20080091855 Apparatus and Method for Communicating with an I/O Adapter Using Cached Address Translations
04/17/2008US20080091754 Reciprocal calculation unit and reciprocal calculation method
04/17/2008US20080090655 Electronic game and method for playing a game based upon removal and replacing symbols in the game matrix
04/16/2008EP1402340B1 First-in, first-out memory system and method thereof
04/16/2008CN101164038A Low-power register array for fast shift operations
04/16/2008CN100382009C Queuing system for buffering data from multiple input-stream, system and method
04/15/2008US7360036 Data memory circuit
04/15/2008US7359956 Data transfer scheme using caching and differential compression techniques for reducing network load
04/10/2008US20080086579 Reliable asynchronous serial protocol between remote operated devices and input/output controller
04/09/2008CN100380819C Data transfer control device and electronic instrument
04/09/2008CN100380313C Method and apparatus for efficient synchronous MIMD operation with ivLIM PE-to-PE communication
04/09/2008CN100380312C Command set operated on pocket data
04/08/2008US7356625 Moving, resizing, and memory management for producer-consumer queues by consuming and storing any queue entries from an old queue before entries from a new queue
04/08/2008US7356624 Interface between different clock rate components
04/03/2008DE19830625B4 Digitale Schnittstelleneinheit Digital Interface Unit
04/03/2008DE102004059125B4 Vorrichtung und Verfahren zum Schreiben von Daten in einen Speicher eines Prozessors an einen unausgerichteten Ort Apparatus and method for writing data into a memory of a processor to a place unaligned
04/02/2008EP1120018B2 Intelligent electrical devices
04/02/2008CN101154207A Operating method for configured interface of microcontroller
04/02/2008CN100378649C FIFO-register and digital signal processor comprising a FIFO-register
04/02/2008CN100378648C Creating volume images
04/01/2008US7353356 High speed, low current consumption FIFO circuit
04/01/2008US7353344 Storage device
04/01/2008US7352372 Indirect addressing mode for display controller
03/2008
03/27/2008WO2008034213A1 A method and system for data compression in a relational database
03/27/2008US20080075214 Information processing apparatus working at variable operating frequency
03/26/2008CN100377259C Bidirectional shift register and display device incorporating same
03/26/2008CN100377072C First-in, first-out memory system and method thereof
03/25/2008US7350092 Data synchronization arrangement
03/25/2008US7350005 Handling interrupts in a system having multiple data processing units
03/25/2008US7350003 Method, system, and apparatus for an adaptive weighted arbiter
03/19/2008CN101145147A Three-dimensional multiprocessor system chip
03/18/2008US7346798 Circuit and method for aligning transmitted data by adjusting transmission timing for plurality of lanes
03/18/2008US7346778 Security method and apparatus for controlling the data exchange on handheld computers
03/18/2008US7346713 Methods and apparatus for servicing commands through a memory controller port
03/18/2008US7346643 Processor with improved accuracy for multiply-add operations
03/18/2008US7346483 Dynamic FIFO for simulation
03/13/2008US20080062102 Liquid crystal display device and control method used in same
03/13/2008DE69838028T2 Linearvektorrechnung Linear Vector Analysis
03/12/2008CN100375007C method and device for reading or writing data unit from common buffer memory
03/11/2008US7343433 Method and apparatus for controlling amount of buffer data in a receiver of a data communication system, and method and apparatus for playing streaming data with adaptive clock synchronization unit
03/07/2008CA2600330A1 Method and apparatus for managing queues
03/06/2008US20080059665 Systems and methods of inter-frame compression
03/05/2008EP1895705A2 Clock synchronization of data streams
03/05/2008EP1894089A2 Data pipeline management system and method for using the system
03/05/2008EP1556753A4 Declarative markup for scoring multiple time-based assets and events within a scene composition system
03/05/2008CN101135962A Data accesses method
03/05/2008CN100373780C Data transfer control device and electronic instrument
03/05/2008CN100373325C Method and apparatus for regulating non-deterministic length information
03/04/2008US7340552 Bus control system
03/04/2008US7340538 Method for dynamic assignment of slot-dependent static port addresses
03/04/2008US7340495 Superior misaligned memory load and copy using merge hardware
02/2008
02/28/2008US20080052424 Data access system, data access apparatus, data access integrated circuit, and data access method
02/28/2008US20080048574 Intelligent Electrical Switching Device
02/26/2008US7337347 Information processing system and method for timing adjustment
02/26/2008US7337247 Buffer and method of diagnosing buffer failure
02/26/2008US7337202 Shift-and-negate unit within a fused multiply-adder circuit
02/26/2008US7336037 Intelligent electrical switching device
02/21/2008US20080046613 Method, apparatus and system for pre-boot note display
02/21/2008US20080046610 Priority and bandwidth specification at mount time of NAS device volume
02/20/2008CN101128795A Semantic processor storage server architecture
02/20/2008CN100370415C Threading metod for processing data packets based on FIFO queue and device of
02/12/2008US7331017 Verified scheduling of recurrent program recording operations
02/12/2008US7330918 Buffer memory management method and system
02/12/2008US7330917 Decimation of fixed length queues having a number of position for holding data wherein new data is favored over old data
02/06/2008CN101120299A Asynchronous jitter reduction technique
02/05/2008US7328407 Automatic view selection
02/05/2008US7328359 Technique to create link determinism
02/05/2008US7328148 Transferring compressed audio via a playback buffer
01/2008
01/31/2008US20080024835 System, control method, image processing device, image forming device, and program
01/30/2008CN101114215A Circuit for realizing data ordering and method thereof
01/29/2008US7325171 Measurement and data acquisition system including a real-time monitoring circuit for implementing control loop applications
01/29/2008US7325081 CRC data protection scheme for non-block-oriented data
01/29/2008US7325080 Data collection system
01/24/2008US20080022146 Differential power analysis
01/23/2008EP1880299A2 Latency insensitive fifo signaling protocol
01/23/2008CN101110015A Data reversal bucket shaped shift unit based on mask code
01/22/2008US7321980 Software power control of circuit modules in a shared and distributed DMA system
01/22/2008US7321945 Interrupt control device sending data to a processor at an optimized time
01/17/2008US20080012834 Key button using lcd window
01/16/2008EP1879101A1 A method and system for controlling data synchronization in FIFO memories, and related synchronizer
01/16/2008EP1877892A2 System and method for controlling operation of a component on a computer system
01/15/2008US7320013 Method and apparatus for aligning operands for a processor
01/09/2008CN101101542A Method and apparatus for flexible data types
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