| Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643) |
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| 02/24/2005 | US20050040893 Spectrum profile control for a PLL and the like |
| 02/24/2005 | US20050040876 Clock generator with one pole and method for generating a clock |
| 02/24/2005 | US20050040875 Multi-phase clock signal generators and methods of generating multi-phase clock signals |
| 02/24/2005 | US20050040872 PLL circuit and image display device |
| 02/24/2005 | US20050040871 Apparatus and method for delay matching of full and divided clock signals |
| 02/24/2005 | DE10261476B4 Analoge PLL mit Schaltkondensator-Resampling-Filter Analog PLL with switched capacitor filter resampling |
| 02/23/2005 | CN1586041A Signal processing device, signal processing method, delta-sigma modulation type fractional division PLL frequency synthesizer, radio communication device, delta-sigma modulation type D/A converter |
| 02/23/2005 | CN1586038A Fractional-N type frequency synthesizer |
| 02/23/2005 | CN1585476A Digital transmission system and clock reproducing device |
| 02/23/2005 | CN1585284A 高频信号接收机 High-frequency signal receiver |
| 02/23/2005 | CN1585275A Method and device for controlling oscillators |
| 02/23/2005 | CN1585274A Loop filter of phaselocked loop with initial circuit |
| 02/23/2005 | CN1585273A Method for realizing clock interactive synchronization |
| 02/23/2005 | CN1585272A Method and apparatus for charging pumping circuit |
| 02/23/2005 | CN1584774A 半导体集成电路 The semiconductor integrated circuit |
| 02/23/2005 | CN1190931C Radio transmitter and method for producing RF output signals in phase-locked loops |
| 02/23/2005 | CN1190909C Equipment and method for synchronous timer modulation with power source modulation in band expansion timer system |
| 02/23/2005 | CN1190899C Laser quantum system |
| 02/23/2005 | CN1190898C 锁相环电路 PLL |
| 02/23/2005 | CN1190897C Oscillator using calibration means (SE) |
| 02/22/2005 | US6859750 Ramp sweep synthesis control |
| 02/22/2005 | US6859509 Wide bandwidth phase-locked loop circuit |
| 02/22/2005 | US6859502 Transmitting and receiving apparatus capable of the suppression of the microphonic noise in digital transmission system |
| 02/22/2005 | US6859404 Apparatus and method of compensating for phase delay in semiconductor device |
| 02/22/2005 | US6859109 Double-data rate phase-locked-loop with phase aligners to reduce clock skew |
| 02/22/2005 | US6859108 Current biased phase locked loop |
| 02/22/2005 | US6859107 Frequency comparator with hysteresis between locked and unlocked conditions |
| 02/22/2005 | US6859106 PLL circuit and phase difference detecting circuit that can reduce phase pull-in time and adjust a skew at a higher precision |
| 02/22/2005 | US6859104 Tunable power amplifier matching circuit |
| 02/22/2005 | US6859083 Circuits for reducing leakage currents in pull-up and pull-down circuits using very small MOSFET devices |
| 02/22/2005 | US6859082 Balanced programmable delay element |
| 02/22/2005 | US6859081 Duty cycle correction circuit and delay locked loop having the same |
| 02/22/2005 | US6859080 Systems to control signal phase |
| 02/22/2005 | US6859079 Semiconductor device capable of accurately producing internal multi-phase clock signal |
| 02/22/2005 | US6859078 Delay lock loop circuit |
| 02/22/2005 | US6859077 Startup circuit for analog integrated circuit applications |
| 02/22/2005 | US6859073 Fast VCO calibration for frequency synthesizers |
| 02/22/2005 | US6859068 Self-correcting I/O interface driver scheme for memory interface |
| 02/22/2005 | US6859027 Device and method for measuring jitter in phase locked loops |
| 02/21/2005 | CA2477028A1 Wireless transmit-only apparatus and method |
| 02/19/2005 | CA2474400A1 Gps receiver with recalibration and methods for recalibrating and reconfiguring a gps receiver |
| 02/17/2005 | WO2005015759A1 Transceiver architecture with reduced vco-pulling sensitivity |
| 02/17/2005 | WO2005015744A1 Variable frequency synthesizer comprising a sigma-delta modulator |
| 02/17/2005 | WO2005015743A1 Self-calibrating controllable oscillator in a phase locked loop |
| 02/17/2005 | WO2004075414B1 Circuitry to reduce pll lock acquisition time |
| 02/17/2005 | US20050037736 System and method for controlling a mobile terminal using a digital signature |
| 02/17/2005 | US20050036580 Programmable phase-locked loop fractional-N frequency synthesizer |
| 02/17/2005 | US20050036579 Clock recovery circuit and clock-recovering filter circuit |
| 02/17/2005 | US20050036566 Transceiver architecture with reduced VCO-pulling sensitivity |
| 02/17/2005 | US20050035800 Percent-of-clock delay circuits with enhanced phase jitter immunity |
| 02/17/2005 | US20050035799 Method and circuit for adjusting the timing of output data based on an operational mode of output drivers |
| 02/17/2005 | US20050035798 Circuit, apparatus and method for obtaining a lock state value |
| 02/17/2005 | US20050035797 Compensator for leakage through loop filter capacitors in phase-locked loops |
| 02/17/2005 | US20050035796 Power-on reset circuit, semiconductor integrated circuit device including the same and method for generating a power-on reset signal |
| 02/17/2005 | DE10310065B4 Verfahren und Vorrichtung für eine Verzögerungsverriegelungsschleife Method and apparatus for a delay-locked loop |
| 02/17/2005 | DE10210726B4 Latenz-Zeitschaltung für ein S-DRAM Latency time circuit for an S-DRAM |
| 02/17/2005 | DE10032248B4 Steuerbare Stromquelle Controllable current source |
| 02/17/2005 | DE10012079B4 Taktsteuerschaltung und -Verfahren Clock control circuit and method |
| 02/16/2005 | EP1507425A1 System and method for controlling a mobile terminal using a digital signature |
| 02/16/2005 | EP1290800B1 Digital phase-locked loop |
| 02/16/2005 | EP0893886B1 Device for synchronising a digital receiver |
| 02/16/2005 | CN2679923Y Device of carrying out multiple clocks in same system |
| 02/16/2005 | CN1581914A Method for realizing official telephone of SDH device using IP telephone |
| 02/16/2005 | CN1581772A System and method for controlling a mobile terminal using a digital signature |
| 02/16/2005 | CN1581701A Pll合成器 Pll synthesizer |
| 02/16/2005 | CN1581700A Regulation for clock |
| 02/16/2005 | CN1581699A Phase swallowing device and signal generating device using same |
| 02/16/2005 | CN1581691A Integrated circuit, method and apparatus for fine tuning clock signals of an integrated circuit |
| 02/16/2005 | CN1581690A Delay circuit and delay sysnchronization loop device |
| 02/16/2005 | CN1190012C Frequency-multiplying delay locked loop |
| 02/16/2005 | CN1190011C Method for improving switching performance of phase-lockes loop's reference signal |
| 02/16/2005 | CN1190009C Circuit for receiving input data |
| 02/15/2005 | US6856791 Direct automatic frequency control method and apparatus |
| 02/15/2005 | US6856661 Using phase interpolator information to detect a loss of lock condition during recovery of a clock signal from a received data stream |
| 02/15/2005 | US6856658 Digital PLL circuit operable in short burst interval |
| 02/15/2005 | US6856586 Recording clock generating device and method thereof |
| 02/15/2005 | US6856558 Integrated circuit devices having high precision digital delay lines therein |
| 02/15/2005 | US6856358 Phase-increase induced backporch decrease (PIBD) phase recovery method for video signal processing |
| 02/15/2005 | US6856207 Jitter-less phase detector in a clock recovery circuit |
| 02/15/2005 | US6856206 Method and apparatus for acquiring a frequency without a reference clock |
| 02/15/2005 | US6856205 VCO with automatic calibration |
| 02/15/2005 | US6856204 Phase locked loop circuit having wide locked range and semiconductor integrated circuit device having the same |
| 02/15/2005 | US6856203 Phase lock loop with controllable lock time |
| 02/15/2005 | US6856202 Phase/frequency detector and phase lock loop circuit |
| 02/15/2005 | US6856183 Scheme to improve performance of timing recovery systems for read channels in a disk drive |
| 02/15/2005 | US6856182 Charge pump |
| 02/15/2005 | US6856181 Stability robustness using a non-integer order filter in a circuit |
| 02/15/2005 | US6856180 Programmable loop bandwidth in phase locked loop (PLL) circuit |
| 02/15/2005 | US6855995 Physically defined varactor in a CMOS process |
| 02/10/2005 | WO2005013548A1 Structures and methods for capturing data from data bit streams |
| 02/10/2005 | WO2005013106A1 Clock generator |
| 02/10/2005 | WO2005013044A2 Clock generator with skew control |
| 02/10/2005 | WO2005012925A2 Improved resource allocation technique |
| 02/10/2005 | US20050031065 System and method for automatically correcting duty cycle distortion |
| 02/10/2005 | US20050030433 Direct conversion tuner capable of receiving digital television signals in UHF band and VHF band |
| 02/10/2005 | US20050030206 High-resolution timers and pulse width modulators |
| 02/10/2005 | US20050030115 Complementary metal-oxide semiconductor xylophone bar magnetometer with automatic resonance control |
| 02/10/2005 | US20050030114 Analog implementation of spread spectrum frequency modulation in a programmable phase locked loop (PLL) system |
| 02/10/2005 | US20050030110 System and method generating a delayed clock output |
| 02/10/2005 | US20050030109 Voltage controlled oscillator and method of generating an oscillating signal |