Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
11/2004
11/24/2004EP1374404B1 Phase locked loop with a linear phase detector
11/24/2004EP1175760B1 Method and circuit arrangement for adjusting the sampling rate of a phase-modulated signal
11/24/2004EP1051805A4 Self-calibrating programmable phase shifter
11/24/2004CN1550070A Method and apparatus for clock and power control in wireless systems
11/24/2004CN1550016A Methods and apparatus for utilizing flash burst mode to improve processor performance
11/24/2004CN1549976A Generic serial port architecture and system
11/24/2004CN1549971A High-speed program tracing
11/24/2004CN1549961A Dynamic voltage control method and apparatus
11/24/2004CN1549960A Phase locked loop fast power up methods and apparatus
11/24/2004CN1549492A Phase frequency detector for digital phase locked loop system
11/24/2004CN1549452A Phase frequency detecting circuit for phaselocked loop circuit
11/24/2004CN1549451A Fast frequency locking method and structure for realizing adaptive asymmetric electric charge pump current mechanism
11/24/2004CN1549450A Clock generating circuit and generating method
11/24/2004CN1177410C Frequency discrimination signal treating method and frequency discriminator adopting simplified maximum likelihood frequency difference
11/24/2004CN1177409C Circuit and method for restoring digital clock signal
11/23/2004US6823033 ΣΔdelta modulator controlled phase locked loop with a noise shaped dither
11/23/2004US6823032 Telecommunication device including a clock generation unit
11/23/2004US6823031 Automated frequency compensation for remote synchronization
11/23/2004US6822922 Clock synchronous circuit
11/23/2004US6822520 Low noise load pump for phase-locking loop
11/23/2004US6822519 Synthesizer structures and alignment methods that facilitate quadrature demodulation
11/23/2004US6822494 Register controlled delay locked loop
11/23/2004US6822484 High-frequency phase/frequency detector with improved reset mechanism
11/18/2004WO2004100380A1 Method and apparatus for a low jitter dual-loop fractional -n synthesizer
11/18/2004WO2004100379A1 Pll circuit
11/18/2004WO2004100370A2 Frequency control apparatus, information processing apparatus and program
11/18/2004WO2004099955A1 Deskew system in a clock distribution network using a pll and a dll
11/18/2004WO2004066074A3 Clock and data recovery phase-locked loop and high-speed phase detector architecture
11/18/2004US20040230408 Automatic phase lock loop design using geometric programming
11/18/2004US20040228636 Novel 10 Gbit/sec transmit structure with programmable clock delays
11/18/2004US20040228431 Method and device for generating a system clock
11/18/2004US20040228430 Methods and apparatus for signal modification in a fractional-N phase locked loop system
11/18/2004US20040227594 High quality resonant circuit based on tuning of bonding wire inductances
11/18/2004US20040227578 Acoustic resonance-based frequency synthesizer using at least one bulk acoustic wave (BAW) or thin film bulk acoustic wave (FBAR) device
11/18/2004US20040227554 Amplifier circuit with output delay selectively changed according to common mode voltage level, associated replica delay circuit and internal clock generator
11/18/2004US20040227553 Reliable phase adjustment circuit
11/18/2004US20040227550 Semiconductor device having delay-locked loop and test method thereof
11/18/2004US20040227548 Apparatus for generating clock signal in optical disk and method thereof
11/18/2004DE10320513A1 Voltage or current controlled oscillator circuit, e.g. for FM transmitter, containing DC signal sensitive network of frequency determining components, with control and modulation inputs and PLL and modulation generator
11/18/2004DE10297345T5 Phasenregelkreisschaltung, Delay-Locked-Loop-Schaltung, Taktgenerator, Halbleitertestgerät und integrierter Halbleiterschaltkreis Phase locked loop circuit delay locked loop circuit, clock generator, semiconductor testing equipment and semiconductor integrated circuit
11/18/2004DE10262079A1 Verfahren und Vorrichtung zum Extrahieren einer einem Datenstrom zugrundeliegenden Taktfrequenz Method and apparatus for extracting a clock frequency underlying a data stream
11/17/2004EP1476801A2 Electronic circuits
11/17/2004EP1476800A1 Seamless clock
11/17/2004EP0941589B1 A method and a circuit for generating a system clock signal
11/17/2004CN1547701A Methods and apparatus for improving throughput of cache-based embedded processors by switching tasks in response to a cache miss
11/16/2004US6819730 Filtering method for digital phase lock loop
11/16/2004US6819729 Digital PLL pulse generating apparatus
11/16/2004US6819728 Self-correcting multiphase clock recovery
11/16/2004US6819726 Dynamic phase alignment circuit
11/16/2004US6819725 Jitter frequency shifting Δ-Σ modulated signal synchronization mapper
11/16/2004US6819626 Semiconductor integrated circuit device
11/16/2004US6819624 Latency time circuit for an S-DRAM
11/16/2004US6819274 Method for tuning a bandpass analog-to-digital converter and associated architecture
11/16/2004US6819197 Multiple bandwidth phase lock filters for multimode radios
11/16/2004US6819194 Tunable voltage-controlled temperature-compensated crystal oscillator
11/16/2004US6819192 Jitter estimation for a phase locked loop
11/16/2004US6819190 Robust fractional clock-based pulse generator for digital pulse width modulator
11/16/2004US6819188 Phase-locked loop oscillator with loop gain compensation
11/16/2004US6819187 Limit swing charge pump and method thereof
11/16/2004US6819186 Electrical circuit arrangement, phase locked loop and method for operating an oscillator
11/16/2004US6819157 Delay compensation circuit
11/16/2004US6819153 Semiconductor device for clock signals synchronization accuracy
11/16/2004US6819152 Circuitry for reducing leakage currents in a pre-charge circuit using very small MOSFET devices
11/16/2004US6819151 Method and circuit for adjusting the timing of output data based on an operational mode of output drivers
11/16/2004US6819150 Method and apparatus for quick clock swapping using much slower asynchronous clock for power savings
11/16/2004US6819092 Digitally switchable current source
11/11/2004WO2004098120A1 Clock data recovery circuit
11/11/2004WO2004034564A3 Trimming of a two point phase modulator
11/11/2004WO2003050961A3 Precise synchronization of distributed systems
11/11/2004US20040223578 Clock recovery circuit
11/11/2004US20040223577 Apparatus and methods for clock signal recovery and for jitter measurement relative to the recovered clock signal
11/11/2004US20040223576 Fractional-type Phase-Locked Loop circuit with compensation of phase errors
11/11/2004US20040223575 Frequency/phase locked loop clock synthesizer using an all digital frequency detector and an analog phase detector
11/11/2004US20040223571 Delay locked loop circuitry for clock delay adjustment
11/11/2004US20040223570 System and method for compensating for skew between a first clock signal and a second clock signal
11/11/2004US20040223565 System and method for maintaining a stable synchronization state in a programmable clock synchronizer
11/11/2004US20040223367 Phase detector for all-digital phase locked and delay locked loops
11/11/2004US20040222925 Inverted-F ferroelectric antenna
11/11/2004US20040222866 Digital pulse width modulation
11/11/2004US20040222857 Phase detector for a programmable clock synchronizer
11/11/2004US20040222856 Calibration of oscillator devices
11/11/2004US20040222832 Interpolator circuit
11/11/2004US20040222831 Synchronization circuit and synchronization method
11/11/2004US20040222830 DLL circuit for stabilization of the initial transient phase
11/11/2004US20040222829 Delay-locked loop (DLL) capable of directly receiving external clock signals
11/11/2004US20040222828 Timing adjustment circuit and semiconductor device including the same
11/11/2004US20040222825 Frequency divider with funnel structure
11/11/2004DE10297457T5 Zeiterzeugungsvorrichtung und Prüfvorrichtung Timing generation device and testing unit
11/11/2004DE102004016120A1 Anordnung zur automatischen Frequenzregelung in drahtlosen Kommunikationssystemen mit mehreren Basisstationen An automatic frequency control in wireless communication systems with multiple base stations
11/10/2004EP1475891A1 Built-in self-test circuit for phase locked loops, test method and computer program product therefore
11/10/2004EP1475885A1 Temperature compensation type oscillator
11/10/2004EP1474900A2 Cmi signal timing recovery
11/10/2004EP1474872A2 Phase-locked-loop with reduced clock jitter
11/10/2004CN1545763A Frequency synthesizer with three mode loop filter charging
11/10/2004CN1545762A Compensating for differences between clock signals
11/10/2004CN1545210A Method and apparatus for realizing high precision three stage clock
11/10/2004CN1175585C Oscillator control
11/10/2004CN1175574C Circuit arrangement for generating a clock-pulse signal having a frequency synchronous with a reference clock-pulse signal
11/10/2004CN1175573C 电压控制振荡器 A voltage controlled oscillator
11/10/2004CN1175571C Delay circuit, clock generating circuit and phase synchronized circuit