| Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643) |
|---|
| 01/27/2005 | US20050022076 Phase error determination method and digital phase-locked loop system |
| 01/27/2005 | US20050018801 Wobble clock generator and driving method thereof |
| 01/27/2005 | US20050018800 Apparatus of adjusting wobble clock |
| 01/27/2005 | US20050018776 Bit-detection arrangement and apparatus for reproducing information |
| 01/27/2005 | US20050018764 Method of determining adip information through counting identical bits and different bits |
| 01/27/2005 | US20050018579 Data slicer of dynamically adjusting slice level |
| 01/27/2005 | US20050018562 Method and related apparatus for evaluating beta-parameter according to write-in result of portion of write-in data with specific content while performing optimal power control of optical disk drive |
| 01/27/2005 | US20050018549 Method and related apparatus for evaluating beta-parameter according to results of read data sliced with different slicing levels while performing optimal power control of optical disk drive |
| 01/27/2005 | US20050018337 Preamble pattern and magnetic recording system using the pattern |
| 01/27/2005 | US20050017887 Signal processing device, signal processing method, delta-sigma modulation type fractional division pll frequency synthesizer, radio communication device, delta-sigma modulation type d/a converter |
| 01/27/2005 | US20050017810 Phase detector for reducing noise |
| 01/27/2005 | US20050017777 Clock divider of delay locked loop |
| 01/27/2005 | US20050017776 Chopped charge pump |
| 01/27/2005 | US20050017775 PLL/DLL circuitry programmable for high bandwidth and low bandwidth applications |
| 01/27/2005 | US20050017774 Precision closed loop delay line for wide frequency data recovery |
| 01/27/2005 | US20050017773 Phase locked loop circuit |
| 01/27/2005 | US20050017772 Method and related apparatus for decoding information carried by wobble signals |
| 01/27/2005 | US20050017771 Phase swallow device and signal generator using the same |
| 01/27/2005 | US20050017758 Method of detecting phase difference, phase detector for performing the same and clock-and-data recovering device including the phase detector |
| 01/27/2005 | DE10340588A1 Delay Locked Loop und Verfahren zum Treiben derselben Delay locked loop and method of driving the same |
| 01/26/2005 | EP1500205A1 Frequency synthesizers for supporting voice communication and wireless networking standards |
| 01/26/2005 | EP1499955A2 Method and apparatus for timing and event processing in wireless systems |
| 01/26/2005 | EP1196996B1 Electronic circuit with a digital section and an analog section, for a PLL |
| 01/26/2005 | CN1571957A Clock loss detection and switchover circuit |
| 01/26/2005 | CN1571280A Method for generating high frequency signal using multi-phase low frequency signal and related device |
| 01/26/2005 | CN1570805A Device and operating method for signal synchronization between different time pulse domains |
| 01/26/2005 | CN1186879C Method and device for calibrating FM PLL |
| 01/26/2005 | CN1186878C Universal clock generator |
| 01/26/2005 | CN1186877C Low jitter data transmission device |
| 01/25/2005 | US6847789 Linear half-rate phase detector and clock and data recovery circuit |
| 01/25/2005 | US6847693 Method and device providing data derived timing recovery for multicarrier communications |
| 01/25/2005 | US6847409 Video switching detecting circuit |
| 01/25/2005 | US6847271 Component having an acoustically active material for tuning during operation |
| 01/25/2005 | US6847246 Method and apparatus for reducing jitter and power dissipation in a delay line |
| 01/25/2005 | US6847243 Clock controlling method and circuit |
| 01/25/2005 | US6847242 Escalator code-based delay-locked loop apparatus and corresponding methods |
| 01/25/2005 | US6847241 Delay lock loop using shift register with token bit to select adjacent clock signals |
| 01/25/2005 | CA2389295C Systems and methods for holdover circuits in phase locked loops |
| 01/25/2005 | CA2199933C Dual-mode satellite/cellular phone with a frequency synthesizer |
| 01/20/2005 | WO2005006392A2 Low voltage circuit for interfacing with high voltage analog signals |
| 01/20/2005 | WO2004082196A3 Frequency synthesizer with prescaler |
| 01/20/2005 | WO2004073175A3 Adaptive input logic for phase adjustments |
| 01/20/2005 | US20050013396 Digital clock recovery circuit employing fixed clock oscillator driving fractional delay line |
| 01/20/2005 | US20050013389 Wireless data communication demodulation device and demodulation method |
| 01/20/2005 | US20050013343 Spread-spectrum clock signal generator |
| 01/20/2005 | US20050012555 Self-calibrating controllable oscillator |
| 01/20/2005 | US20050012532 Method for consistent on/off object to control radios and other interfaces |
| 01/20/2005 | US20050012528 Synthesizer |
| 01/20/2005 | US20050012525 Clock loss detection and switchover circuit |
| 01/19/2005 | EP1499046A2 Precision timing generator system and method |
| 01/19/2005 | EP1497945A2 Precise synchronization of distributed systems |
| 01/19/2005 | EP1497924A1 Arrangement and method relating to phase locking comprising storing means |
| 01/19/2005 | EP1497922A1 A synchronization signal processor |
| 01/19/2005 | CN1568629A Method for enabling subscriber entity to actively communicate in a communication network |
| 01/19/2005 | CN1568599A Methods and apparatus for identifying asset location in communication networks |
| 01/19/2005 | CN1567725A Phase-lock loop framework capable of avoiding frequency drift and jitter |
| 01/19/2005 | CN1567724A A quick bit synchronous circuit |
| 01/19/2005 | CN1567720A Miscellaneous time pulse period controlled interface circuit and method of voltage control time delay element |
| 01/19/2005 | CN1567710A An oscillator characteristic curve correcting system and equipment |
| 01/18/2005 | US6845490 Clock switching circuitry for jitter reduction |
| 01/18/2005 | US6845459 System and method to provide tight locking for DLL and PLL with large range, and dynamic tracking of PVT variations using interleaved delay lines |
| 01/18/2005 | US6845458 System and method of operation of DLL and PLL to provide tight locking with large range, and dynamic tracking of PVT variations using interleaved delay lines |
| 01/18/2005 | US6845139 Co-prime division prescaler and frequency synthesizer |
| 01/18/2005 | US6844836 Single-bit sigma-delta modulated fractional-N frequency synthesizer |
| 01/18/2005 | US6844785 Phase-lock loop for preventing frequency drift and jitter and method thereof |
| 01/18/2005 | US6844774 Method and apparatus for providing well-matched source and sink currents |
| 01/18/2005 | US6844763 Wideband modulation summing network and method thereof |
| 01/18/2005 | US6844762 Capacitive charge pump |
| 01/18/2005 | US6844761 DLL with false lock protector |
| 01/18/2005 | US6844758 Frequency synthesizer |
| 01/13/2005 | WO2005004333A2 Gain compensated fractional-n phase lock loop system and method |
| 01/13/2005 | WO2005004332A2 Improved charge pump system for fast locking phase lock loop |
| 01/13/2005 | WO2005004331A2 Differential charge pump phase lock loop (pll) synthesizer with adjustable tuning voltage range |
| 01/13/2005 | WO2005004315A2 Chopped charge pump |
| 01/13/2005 | WO2005003930A2 A low latency comma detection circuit in high speed transceiver |
| 01/13/2005 | US20050010885 Pulse-width limited chip clock design |
| 01/13/2005 | US20050008113 Spread spectrum clock generator and integrated circuit device using the spread spectrum clock generators |
| 01/13/2005 | US20050008112 Phase synchronization circuit |
| 01/13/2005 | US20050008111 Semiconductor integrated circuit device |
| 01/13/2005 | US20050007720 Apparatus and method for generating wobble clock |
| 01/13/2005 | US20050007493 Equilibrium based vertical sync phase lock loop for video decoder |
| 01/13/2005 | US20050007492 Equilibrium based vertical sync phase lock loop for video decoder |
| 01/13/2005 | US20050007204 High spectral purity microwave oscillator using air-dielectric cavity |
| 01/13/2005 | US20050007203 Frequency synthesizing circuit |
| 01/13/2005 | US20050007202 Synthesizer with lock detector, lock algorithm, extended range VCO, and a simplified dual modulus divider |
| 01/13/2005 | US20050007187 Charge pump circuit operating responsive to a mode |
| 01/13/2005 | US20050007173 Voltage controlled oscillator delay cell |
| 01/13/2005 | US20050007166 Delay locked loop |
| 01/13/2005 | US20050007165 Method and apparatus for determining a processing speed of an integrated circuit |
| 01/13/2005 | US20050007157 Interlaced delay-locked loolps for controlling memory-circuit timing |
| 01/12/2005 | EP1495543A1 Apparatus and method for symbol timing recovery |
| 01/12/2005 | EP1466405A4 A dual steered frequency synthesizer |
| 01/12/2005 | CN1565081A Phase-switched dual-mode divider counter circuit for a frequency synthesizer |
| 01/12/2005 | CN1564469A Low power loss digital frequency synthetizing method for mobile communication |
| 01/12/2005 | CN1564464A Improved phase switching pre-divider |
| 01/12/2005 | CN1184619C Recording time generating device and method |
| 01/12/2005 | CN1184576C Node synchronizing apparatus and method in dissimilar computer system |
| 01/11/2005 | US6842610 Tuner |
| 01/11/2005 | US6842399 Delay lock loop circuit useful in a synchronous system and associated methods |
| 01/11/2005 | US6842198 TV signal receiving tuner capable of outputting oscillation signal having wide frequency band by means of single local oscillator |