| Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643) |
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| 09/30/2004 | US20040190649 Joint, adaptive control of equalization, synchronization, and gain in a digital communications receiver |
| 09/30/2004 | US20040189417 Oscillator circuit with temperature compensation function |
| 09/30/2004 | US20040189416 Frequency generating device and method thereof |
| 09/30/2004 | US20040189407 Ring oscillator with variable loading |
| 09/30/2004 | US20040189405 Circuit and method for generating a clock signal |
| 09/30/2004 | US20040189403 Communication semiconductor integrated circuit |
| 09/30/2004 | US20040189402 Fast frequency locking method and architecture realized by employing adaptive asymmetric charge-pump current mechanism |
| 09/30/2004 | US20040189372 Timing vernier using a delay locked loop |
| 09/30/2004 | US20040189368 Adaptive delay of timing control signals |
| 09/30/2004 | US20040189364 Integrated circuit devices having improved duty cycle correction and methods of operating the same |
| 09/30/2004 | US20040189363 Phase interpolator and receiver |
| 09/30/2004 | US20040189361 Circuit for generating phase comparison signal |
| 09/30/2004 | US20040189360 Data latch timing adjustment apparatus |
| 09/30/2004 | US20040189359 Circuit and method for generating a clock signal |
| 09/30/2004 | US20040189357 Power-up detector |
| 09/30/2004 | DE19954255B4 Phase Lock Loop und diesbezügliches Verfahren Phase lock loop and method thereof |
| 09/30/2004 | DE19939091B4 Ladungspumpe Charge pump |
| 09/30/2004 | DE19709770B4 Phasenangleichung durch eine Frequenz- und Phasendifferenz zwischen Eingangs- und VCO-Signalen mit einem Frequenzbereich, der durch einen Synchronismus zwischen den Eingangs- und den VCO-Signalen eingestellt ist Phase alignment by a frequency and phase difference between the input and VCO signals with a frequency range which is set by a synchronism between the input and VCO signals |
| 09/29/2004 | EP1463317A2 Method for providing digital cinema content based upon audience metrics |
| 09/29/2004 | EP1391043A4 Fractional-n synthesiser and method of synchronisation of the output phase |
| 09/29/2004 | EP1342321B1 Phase lock loop for recovering a clock signal from a data signal |
| 09/29/2004 | EP1116323A4 Lock-in aid frequency detector |
| 09/29/2004 | CN1533657A Method and method for transmitting data from a first data network into a second data network |
| 09/29/2004 | CN1533634A Dual loop PLL |
| 09/29/2004 | CN1533033A 数字相位分析器和合成器 Digital phase analyzer and synthesizer |
| 09/29/2004 | CN1169374C Clock recovery |
| 09/29/2004 | CN1169299C Phase-locked loop frequency synthesizer with digital coarse tuning loop |
| 09/29/2004 | CN1169297C Method for performing phase comparison, and phase comparator |
| 09/29/2004 | CN1169296C PLL circuit and radio communication terminal using PLL |
| 09/29/2004 | CN1169295C Locking device for standard delay locking loop |
| 09/29/2004 | CN1169294C Master-salve delay locked loop for accurate delay of non-periodic signals |
| 09/29/2004 | CN1169293C Clock forming device |
| 09/28/2004 | US6798858 Lock detector for delay or phase locked loops |
| 09/28/2004 | US6798857 Clock recovery circuit |
| 09/28/2004 | US6798678 Frequency voltage converter |
| 09/28/2004 | US6798303 Clock signal generating device |
| 09/28/2004 | US6798302 Analog implementation of spread spectrum frequency modulation in a programmable phase locked loop (PLL) system |
| 09/28/2004 | US6798300 Oscillator and PLL circuit using the same |
| 09/28/2004 | US6798299 Crystal-less oscillator circuit with trimmable analog current control for increased stability |
| 09/28/2004 | US6798298 Balancing circuit, method of operation thereof and a charge pump employing the same |
| 09/28/2004 | US6798297 Method and apparatus for converging a control loop |
| 09/28/2004 | US6798296 Wide band, wide operation range, general purpose digital phase locked loop architecture |
| 09/28/2004 | US6798266 Universal clock generator using delay lock loop |
| 09/28/2004 | US6798259 System and method to improve the efficiency of synchronous mirror delays and delay locked loops |
| 09/28/2004 | US6798257 Method and apparatus for providing multiple clock signals on a chip using a second PLL library circuit connected to a buffered reference clock output of a first PLL library circuit |
| 09/28/2004 | US6798011 Multi-terminal MOS varactor |
| 09/28/2004 | CA2456496A1 Method for providing digital cinema content based upon audience metrics |
| 09/28/2004 | CA2389160C Clock pulse and data regenerator for different data rates |
| 09/23/2004 | WO2004082196A2 Frequency synthesizer with prescaler |
| 09/23/2004 | WO2004082145A1 Phase-locked loop circuit |
| 09/23/2004 | WO2004082144A1 Phase-locked/frequency-locked loop and phase/frequency comparator therefor |
| 09/23/2004 | WO2004081542A1 Measuring method, measuring signal output circuit, and measuring apparatus |
| 09/23/2004 | WO2004080836A1 Closure and methods for placing and removing such a closure |
| 09/23/2004 | WO2003077422A3 Calibration techniques for frequency synthesizers |
| 09/23/2004 | US20040183613 Method and apparatus for detecting on-die voltage variations |
| 09/23/2004 | US20040183604 High frequency signal source and method of generating same using dielectric resonator oscillator (DRO) circuit |
| 09/23/2004 | US20040183602 RC and SC filter compensation in a radio transceiver |
| 09/23/2004 | US20040183601 Maximally digitized fractional-N frequency synthesizer and modulator with maximal fractional spurs removing |
| 09/23/2004 | US20040183578 Mixed signal delay locked loop characterization engine |
| 09/23/2004 | US20040183577 Delay locked loop having phase comparator |
| 09/23/2004 | US20040183576 Phase locked loop circuit |
| 09/23/2004 | US20040183571 Circuit arrangement having a phase detector and phase locked loop including the circuit arrangement |
| 09/23/2004 | US20040183570 Phase comparator capable of performing stable phase comparison for high frequency band |
| 09/23/2004 | DE10311049A1 Phase/frequency control loop has reset logic unit whose output signal is only activated/deactivated if both output signals of two edge-triggered memory units are activated/deactivated respectively |
| 09/23/2004 | DE10306313A1 Generating system clock for transmitter and/or receiver involves controlling system oscillator depending on at least one control signal present in transmitter and/or receiver to change its frequency |
| 09/22/2004 | EP1460762A1 High-speed, accurate trimming for electronically trimmed VCO |
| 09/22/2004 | EP1460761A1 Automatic equalization system |
| 09/22/2004 | EP1459448A1 Method and device for converting a quantized digital value |
| 09/22/2004 | EP1459447A2 Bit-detection arrangement and apparatus for reproducing information |
| 09/22/2004 | EP1459446A2 A stable frequency or phase-locked loop |
| 09/22/2004 | EP1356651B1 Compensation method for a transceiver using two-point modulation |
| 09/22/2004 | EP0998788B1 Pulse stuffing circuit for programmable delay line |
| 09/22/2004 | CN1531778A Method and apparatus for clock circuit |
| 09/22/2004 | CN1531296A Frequency calibrating method and device for long period of variation |
| 09/22/2004 | CN1531205A Phaselocked integrated circuit for supporting clock signal update during blind spot compensated time interval |
| 09/22/2004 | CN1531204A Topology for providing clock signal on electric circuit module with circuit unit |
| 09/22/2004 | CN1168259C Clock forming circuit |
| 09/22/2004 | CN1168229C Frequency tracking for communication signals using M-array orthogonal walsh modulation |
| 09/22/2004 | CN1168214C Phaselocked loop frequency synthesizer using charge pump |
| 09/22/2004 | CN1168213C Device capable of preventing mutual interference in oscillating signal generator and its method |
| 09/21/2004 | US6795695 Receiver having narrow bandwidth phase-locked loop demodulator |
| 09/21/2004 | US6795519 Fractional divider |
| 09/21/2004 | US6795517 Low power phase locked loop frequency synthesizer |
| 09/21/2004 | US6795516 Reset circuit and pll frequency synthesizer |
| 09/21/2004 | US6795514 Integrated data clock extractor |
| 09/21/2004 | US6795510 Apparatus and method for symbol timing recovery |
| 09/21/2004 | US6794949 Frequency generating device and method thereof |
| 09/21/2004 | US6794946 Frequency acquisition for data recovery loops |
| 09/21/2004 | US6794945 PLL for clock recovery with initialization sequence |
| 09/21/2004 | US6794944 Lock detection circuit |
| 09/21/2004 | US6794918 Loop-back clock phase generator |
| 09/21/2004 | US6794913 Delay locked loop with digital to phase converter compensation |
| 09/21/2004 | US6794912 Multi-phase clock transmission circuit and method |
| 09/21/2004 | US6794911 Charge-pump circuit for charge-share suppression |
| 09/21/2004 | US6794910 Method and circuit for synchronizing signals |
| 09/16/2004 | WO2004079914A1 Phase-locked loop circuit |
| 09/16/2004 | WO2004079913A1 Digital pll circuit |
| 09/16/2004 | WO2004079912A1 Improvements relating to frequency and/or phase lock loops |
| 09/16/2004 | WO2004079911A2 Clock and data recovery method and apparatus |
| 09/16/2004 | WO2004079907A1 Phase comparison circuit and cdr circuit |