G11C 7 - Arrangements for writing information into, or reading information out from, a digital store

Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
10/2011
10/25/2011	US8045407 Memory-write timing calibration including generation of multiple delayed timing signals
10/25/2011	US8045406 Latency circuit using division method related to CAS latency and semiconductor memory device
10/25/2011	US8045405 Memory system, memory device and command protocol
10/25/2011	US8045404 Semiconductor memory device capable of preventing damage to a bitline during a data masking operation
10/25/2011	US8045403 Programming method and memory device using the same
10/25/2011	US8045402 Assisting write operations to data storage cells
10/25/2011	US8045401 Supporting scan functions within memories
10/25/2011	US8045400 Circuit and method for controlling read cycle
10/25/2011	US8045399 Data output circuit in a semiconductor memory apparatus
10/25/2011	US8045397 Semiconductor memory device having common circuitry for controlling address and data mask information
10/25/2011	US8045381 Device for protecting a memory against attacks by error injection
10/25/2011	US8045357 Semiconductor memory device
10/25/2011	US8044816 Apparatus, system, and method for detecting the formation of a short between a magnetoresistive head and a head substrate
10/25/2011	US8042999 On die thermal sensor of semiconductor memory device
10/20/2011	WO2011130039A2 Signaling systems, preamplifiers, memory devices and methods
10/20/2011	WO2011130013A2 Multi-port memory having a variable number of used write ports
10/20/2011	WO2011127563A1 Memory programming using variable data width
10/20/2011	WO2011127557A1 Phase change memory with double write drivers
10/20/2011	US20110258395 Preventing Fast Read Before Write in Static Random Access Memory Arrays
10/20/2011	US20110258373 Memory Module, Memory System,and Information Device
10/20/2011	US20110255361 Multi-port memory having a variable number of used write ports
10/20/2011	US20110255360 Semiconductor memory device and method for controlling the same
10/20/2011	US20110255359 Sense-Amplification With Offset Cancellation For Static Random Access Memories
10/20/2011	US20110255358 Semiconductor device having floating body type transistor
10/20/2011	US20110255356 Semiconductor memory device and operation method thereof
10/20/2011	US20110255355 Leakage and NBTI Reduction Technique for Memory
10/20/2011	US20110255354 Semiconductor integrated circuit
10/20/2011	US20110255353 Semiconductor integrated circuit
10/20/2011	US20110255352 Electronic circuit
10/20/2011	US20110255351 Level Shifter with Embedded Logic and Low Minimum Voltage
10/20/2011	CA2793917A1 Phase change memory with double write drivers
10/20/2011	CA2793738A1 Memory programming using variable data width
10/19/2011	EP2378431A1 Nandflash controller and data transmission method thereof
10/19/2011	EP2377127A1 Variable memory refresh devices and methods
10/19/2011	EP1949381B1 Pseudo-dual port memory where ratio of first to second memory access is clock duty cycle independent
10/19/2011	CN202013742U Redundant array of independent disks (RAID) card with data caching protection
10/19/2011	CN202013741U Voice care reminder
10/19/2011	CN202013740U USB flash disk
10/19/2011	CN202013739U U disk easily pluggable
10/19/2011	CN202013738U Card with memory function
10/19/2011	CN1877729B Display control method, content data reproduction apparatus, and program
10/19/2011	CN102223435A Method for displaying connection state of communication component in electric equipment and electric equipment
10/19/2011	CN101499316B Flash memory block management method and controller employing the same
10/19/2011	CN101441888B Method and apparatus for simultaneous differential data sensing and capture in a high speed memory
10/19/2011	CN101154461B Nonvolatile semiconductor memory device
10/18/2011	US8042175 Digital signal processing apparatus
10/18/2011	US8041916 Data storage device and method of operating the same
10/18/2011	US8041760 Service oriented architecture for a loading function in a data integration platform
10/18/2011	US8040753 System and method for capturing data signals using a data strobe signal
10/18/2011	US8040748 Quad SRAM based one time programmable memory
10/18/2011	US8040747 Circuit and method for controlling precharge in semiconductor memory apparatus
10/18/2011	US8040746 Efficient word lines, bit line and precharge tracking in self-timed memory device
10/18/2011	US8040745 Stacked memory and fuse chip
10/18/2011	US8040743 Data storage using read-mask-write operation
10/18/2011	US8040740 Semiconductor device with output buffer control circuit for sequentially selecting latched data
10/18/2011	US8040739 Configurable write policy in a memory system
10/18/2011	US8040723 Voltage compensation circuit, multi-level memory device with the same, and voltage compensation method for reading the multi-level memory device
10/18/2011	US8040711 Apparatus and methods for optically-coupled memory systems
10/18/2011	US8040170 Semiconductor integrated circuit
10/18/2011	US8040150 Impedance adjustment circuit
10/13/2011	WO2011127054A1 Programmable tracking circuit for tracking semiconductor memory read current
10/13/2011	WO2011126619A1 Methods and apparatus for transmission of data
10/13/2011	WO2011123936A1 Semiconductor memory device having a three-dimensional structure
10/13/2011	US20110249524 Programmable Tracking Circuit for Tracking Semiconductor Memory Read Current
10/13/2011	US20110249523 Semiconductor memory device with a sense amplifier controller for maintaining the connection of a previously selected memory cell array
10/13/2011	US20110249522 Method and circuit for calibrating data capture in a memory controller
10/13/2011	US20110249520 Data strobe signal output driver for a semiconductor memory apparatus
10/13/2011	US20110249519 Data reproduction circuit
10/13/2011	US20110249518 Circuits, Systems, and Methods for Dynamic Voltage Level Shifting
10/13/2011	US20110249514 Methods and apparatus for strobe signaling and edge detection thereof
10/13/2011	US20110249513 Transmitting/receiving methods and systems with simultaneous switching noise reducing preambles
10/13/2011	US20110249512 Memory chip and multi-chip package
10/13/2011	US20110249510 Embedded storage apparatus and test method thereof
10/13/2011	US20110249502 Semiconductor device
10/13/2011	US20110249491 Method and apparatus for programming a magnetic tunnel junction (mtj)
10/13/2011	US20110249487 Semiconductor memory device and semiconductor device
10/13/2011	US20110249483 Stacked memory device having inter-chip connection unit, memory system including the same, and method of compensating for delay time of transmission line
10/13/2011	US20110248761 Phase Adjustment Apparatus and Method for a Memory Device Signaling System
10/13/2011	CA2792158A1 Semiconductor memory device having a three-dimensional structure
10/12/2011	EP2374129A1 Digitally-controllable delay for sense amplifier
10/12/2011	CN202008841U Interactive playing system
10/12/2011	CN202008840U Voice recording system
10/12/2011	CN202008839U Wireless storage structure
10/12/2011	CN202008838U Safe USB disk with coded lock
10/12/2011	CN202008837U Two-way direct-reading miniature type TF (Transflash) disc
10/12/2011	CN202005336U Money pot with multiple functions
10/12/2011	CN1905059B Multi-port memory based on DRAM core and controlling method thereof
10/12/2011	CN102216998A Controlled data access to non-volatile memory
10/12/2011	CN102216993A Memory controller
10/12/2011	CN102216992A Mass data storage system with non-volatile memory modules
10/12/2011	CN102215316A Line buffer circuit, image processing apparatus, and image forming apparatus
10/12/2011	CN102214480A Network multimedia terminal equipment
10/12/2011	CN102214143A Method and device for managing multilayer unit flash memory, and storage equipment
10/12/2011	CN101626667B Retractable storage device
10/12/2011	CN101060008B Multi-port memory device with serial input/output interface and control method thereof
10/11/2011	US8037378 Automatic test entry termination in a memory device
10/11/2011	US8036060 Semiconductor device in which a memory array is refreshed based on an address signal
10/11/2011	US8036059 Semiconductor memory circuit, circuit arrangement and method for reading out data
10/11/2011	US8036058 Symmetrically operating single-ended input buffer devices and methods
10/11/2011	US8036057 Semiconductor memory device and control method thereof

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