Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
06/2011
06/22/2011CN102105939A Current sense amplifier with feedback loop
06/22/2011CN102104680A Audio playing method, plug-in playing terminal and mobile terminal
06/22/2011CN102104034A Three-dimensional semiconductor device
06/22/2011CN102104013A Data card and assembling method thereof
06/22/2011CN102103884A Audio playing device
06/22/2011CN102103883A Car music player and playing method
06/22/2011CN102103882A Music player with copyright management function and play method
06/22/2011CN102103881A Moving picture experts group audio layer-3 (MP3) music player with 3rd generation (3G) module and playing method thereof
06/22/2011CN102103880A Universal serial bus (USB) flash disk and memory capacity display method thereof
06/22/2011CN101593549B Nonvolatile memory packaging and storing system as well as controller and access method thereof
06/22/2011CN101414479B One-transistor memory cell on insulator random access memory
06/21/2011US7966530 Methods, devices, and systems for experiencing reduced unequal testing degradation
06/21/2011US7965572 Semiconductor device and information processing system
06/21/2011US7965571 On die thermal sensor
06/21/2011US7965570 Precharge control circuits and methods for memory having buffered write commands
06/21/2011US7965569 Semiconductor storage device
06/21/2011US7965568 Semiconductor integrated circuit device and method of testing same
06/21/2011US7965567 Phase adjustment apparatus and method for a memory device signaling system
06/21/2011US7965566 Circuit and method for controlling local data line in semiconductor memory device
06/21/2011US7965565 Current cancellation for non-volatile memory
06/21/2011US7965564 Processor arrays made of standard memory cells
06/21/2011US7965563 Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein
06/21/2011US7965531 Memory module and memory device
06/21/2011US7964146 Measuring device and methods for use therewith
06/16/2011WO2011069780A1 Cache access memory and method
06/16/2011WO2011069353A1 Media player with low time base jitter
06/16/2011WO2007149709A3 Chip stack with a higher power chip on the outside of the stack
06/16/2011US20110141836 Techniques for reducing impact of array disturbs in a semiconductor memory device
06/16/2011US20110141833 Low-wear writing in a solid state memory device
06/16/2011US20110141832 Program cycle skip
06/16/2011US20110141831 Read buffering systems for accessing multiple layers of memory in integrated circuits
06/16/2011US20110141830 Semiconductor memory device and method for operating the same
06/16/2011US20110141828 Semiconductor system
06/16/2011US20110141826 Cache Array Power Savings Through a Design Structure for Valid Bit Detection
06/16/2011US20110141825 Semiconductor integrated circuit system and electronic equipment
06/16/2011US20110141824 Leakage compensated reference voltage generation system
06/16/2011US20110141823 Semiconductor memory device and method for controlling the same
06/16/2011US20110141822 Source Bias Shift for Multilevel Memories
06/16/2011US20110141817 Semiconductor memory device and method for controlling the same
06/16/2011US20110141814 Nonvolatile semiconductor memory device
06/16/2011US20110141813 Use of emerging non-volatile memory elements with flash memory
06/16/2011US20110141802 Method and system for providing a high density memory cell for spin transfer torque random access memory
06/16/2011US20110141799 Reversing a potential polarity for reading phase-change cells to shorten a recovery delay after programming
06/16/2011US20110141795 Multi-port memory based on dram core
06/16/2011US20110141789 Memory module and memory system
06/16/2011US20110141788 Page register outside array and sense amplifier interface
06/16/2011US20110140741 Integrating receiver with precharge circuitry
06/16/2011DE10343525B4 Verfahren zum Betreiben von Halbleiterbausteinen, Steuervorrichtung für Halbleiterbausteine und Anordnung zum Betreiben von Speicherbausteinen A method of operating of semiconductor devices, the control device for semiconductor devices and arrangement for operating the memory blocks
06/16/2011DE10233878B4 Integrierter synchroner Speicher sowie Speicheranordnung mit einem Speichermodul mit wenigstens einem synchronen Speicher Integrated synchronous memory and memory device having a memory module having at least one synchronous memory
06/16/2011DE102006061359B4 Vorrichtung und Verfahren zur Dateninvertierung Apparatus and method for data inversion
06/16/2011DE102006051284B4 Tastverhältniskorrekturschaltkreis, integrierter Schaltkreis, Phasenregelkreisschaltung, Verzögerungsregelkreisschaltung, Speicherbauelement und Verfahren zum Erzeugen eines Taktsignals Tastverhältniskorrekturschaltkreis, integrated circuit phase locked loop circuit, the delay lock loop circuit, memory device and method for generating a clock signal
06/16/2011DE10031575B4 Halbleiterspeicherbauelement The semiconductor memory device
06/16/2011DE10009346B4 Integrierte Schreib-/Leseschaltung zur Auswertung von zumindest einer Bitline in einem DRAM Speicher Integrated read / write circuit for evaluating at least one bitline in a DRAM memory
06/15/2011EP2332146A1 Data state-based temperature compensation during sensing in non-volatile memory
06/15/2011EP2332142A1 Memory device for resistance-based memory applications
06/15/2011EP1673780B1 Ac sensing for a resistive memory
06/15/2011EP1668646B1 Method and apparatus for implicit dram precharge
06/15/2011EP1497733B1 Destructive-read random access memory system buffered with destructive-read memory cache
06/15/2011CN201868110U Earphone with MP3 playing function
06/15/2011CN201868109U 数字音频播放器 Digital Audio Player
06/15/2011CN201868108U Moving Picture Experts Group Audio Layer III (MP3) play system with wireless transmission function
06/15/2011CN201867980U Inductive type foreign-language teaching-material matched MP3 player
06/15/2011CN201861332U Musical water cup
06/15/2011CN201860932U Magic buckle
06/15/2011CN1848290B Printed wire arrangement for inline memory module
06/15/2011CN1826658B Compensating a long read time of a memory device in data comparison and write operations
06/15/2011CN1790544B 半导体存储器装置 The semiconductor memory device
06/15/2011CN1754101B Method and apparatus for detecting an unused state in a semiconductor circuit
06/15/2011CN1679111B Device writing to a plurality of rows in a memory matrix simultaneously
06/15/2011CN102099861A Memory system and method using stacked memory device dice, and system using the memory system
06/15/2011CN102097120A USB flash disk with improved structure
06/15/2011CN101004939B Apparatus and method of playing back audio signal
06/14/2011US7962809 Method and apparatus for improving memory operation and yield
06/14/2011US7962142 Methods and apparatus for the utilization of core based nodes for state transfer
06/14/2011US7961543 Semiconductor memory device and refresh control method
06/14/2011US7961542 Methods, circuits, and systems to select memory regions
06/14/2011US7961541 Memory device with self-refresh operations
06/14/2011US7961540 Dynamic data restore in thyristor-based memory device
06/14/2011US7961538 Methods for determining resistance of phase change memory elements
06/14/2011US7961537 Semiconductor integrated circuit
06/14/2011US7961535 Test circuit and method for use in semiconductor memory device
06/14/2011US7961533 Method and apparatus for implementing write levelization in memory subsystems
06/14/2011US7961532 Bimodal memory controller
06/14/2011US7961530 Semiconductor device including nonvolatile memory
06/14/2011US7961529 Processor including vertically stacked third-dimensional embedded re-writeable non-volatile memory and registers
06/14/2011US7961528 Buffer control circuit of memory device
06/14/2011US7961527 Buffering systems for accessing multiple layers of memory in integrated circuits
06/14/2011US7961526 Power saving sensing scheme for solid state memory
06/14/2011US7961523 Nonvolatile memory device and programming method
06/14/2011US7961519 Memory employing independent dynamic reference areas
06/14/2011US7961502 Non-volatile state retention latch
06/09/2011US20110138162 Reconfigurable load-reduced memory buffer
06/09/2011US20110134714 Semiconductor memory device changing refresh interval depending on temperature
06/09/2011US20110134713 Methods circuits devices and systems for operating an array of non-volatile memory cells
06/09/2011US20110134711 Memory control circuit and memory control method
06/09/2011US20110134710 Level shift circuit
06/09/2011US20110134709 Semiconductor device including nonvolatile memory
06/09/2011US20110134708 Method and system for controlling refresh to avoid memory cell data losses
06/09/2011US20110134707 Block isolation control circuit
06/09/2011US20110134706 Semiconductor memory device