Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 7 - Arrangements for writing information into, or reading information out from, a digital store
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
11/2011
11/08/2011US8054697 Semiconductor storage device including a lever shift unit that shifts level of potential of bit line pair
11/08/2011US8054696 System and method to improve reliability in memory word line
11/08/2011US8054680 Semiconductor device
11/08/2011US8054667 Multilevel one-time programmable memory device
11/08/2011US8054663 Process variation compensated multi-chip memory package
11/03/2011WO2011134079A1 Phase change memory array blocks with alternate selection
11/03/2011WO2011134055A1 Write scheme in phase change memory
11/03/2011WO2011134051A1 Serially connected memory having subdivided data interface
11/03/2011US20110267914 Semiconductor memory device
11/03/2011US20110267913 Program method of semiconductor memory device
11/03/2011US20110267912 Digit line equilibration using access devices at the edge of sub arrays
11/03/2011US20110267909 Fuse circuit and semiconductor memory device including the same
11/03/2011US20110267907 Semiconductor memory device, semiconductor system including the semiconductor memory device, and method for operating the semiconductor memory device
11/03/2011US20110267906 Measuring SDRAM Control Signal Timing
11/03/2011US20110267905 Semiconductor memory device and method for operating the same
11/03/2011US20110267904 High speed interface for multi-level memory
11/03/2011US20110267903 Semiconductor memory device having dram cell mode and non-volatile memory cell mode and operation method thereof
11/03/2011US20110267902 Semiconductor device
11/03/2011US20110267900 Semiconductor memory device
11/03/2011US20110267899 Non-volatile memory device and non-volatile memory system having the same
11/03/2011US20110267898 Semiconductor memory apparatus
11/03/2011US20110267886 Nonvolatile Semiconductor Memory Device
11/03/2011US20110267878 Josephson Magnetic Random Access Memory System and Method
11/03/2011US20110267877 Semiconductor device
11/03/2011US20110267874 Invalid Write Prevention for STT-MRAM Array
11/03/2011US20110267869 Circuit for verifying the write enable of a one time programmable memory
11/03/2011US20110267868 Shift register memory device, shift register, and data storage method
11/03/2011US20110267028 Measuring device and methods for use therewith
11/03/2011CA2793927A1 Phase change memory array blocks with alternate selection
11/03/2011CA2793922A1 Write scheme in phase change memory
11/02/2011EP2383750A2 Memory controller and memory management method
11/02/2011EP2036090B1 Synchronous memory read data capture
11/02/2011CN202025534U Drawable MP4 (mobile Pentium 4)
11/02/2011CN202025533U Moving picture experts group audio layer III (MP3) with line winding device
11/02/2011CN202021983U MP3 (moving picture experts group audio layer-3) pen
11/02/2011CN202019747U Jacket with MP3 player-controlling function
11/02/2011CN102231854A Multimedia broadcasting program recording method and data card equipment
11/02/2011CN101625887B Memory access and request scheduling device and method for memory access and request scheduling by using device
11/01/2011US8051346 Fault injection
11/01/2011US8051257 Non-volatile memory and method with control data management
11/01/2011US8050129 E-fuse apparatus for controlling reference voltage required for programming/reading e-fuse macro in an integrated circuit via switch device in the same integrated circuit
11/01/2011US8050128 Refresh signal generating circuit
11/01/2011US8050127 Semiconductor memory device
11/01/2011US8050126 Non-volatile memory with improved sensing by reducing source line current
11/01/2011US8050125 Bit line sense amplifier of semiconductor memory device having open bit line structure
11/01/2011US8050124 Semiconductor memory device and method with two sense amplifiers
11/01/2011US8050121 Semiconductor memory, system, operating method of semiconductor memory, and manufacturing method of semiconductor memory
11/01/2011US8050120 Sensing delay circuit and semiconductor memory device using the same
11/01/2011US8050119 Data output timing in response to read command based on whether delay locked loop is enabled/disabled in a semiconductor device
11/01/2011US8050118 Semiconductor memory device
11/01/2011US8050117 Command generation circuit and semiconductor memory device
11/01/2011US8050116 Memory cell write
11/01/2011US8050115 Non-volatile memory device and method of operation therefor
11/01/2011US8050114 Memory device having a single pass-gate transistor per bitline column multiplexer coupled to latch circuitry and method thereof
11/01/2011US8050113 Core voltage discharger and semiconductor memory device with the same
11/01/2011US8050111 Data strobe signal generating circuit capable of easily obtaining valid data window
11/01/2011US8050110 Memory device having latch for charging or discharging data input/output line
11/01/2011US8050109 Semiconductor memory with improved memory block switching
11/01/2011US8050108 Semiconductor memory device and semiconductor memory device operation method
11/01/2011US8050085 Semiconductor processing device and IC card
11/01/2011US8050080 Random access memory with CMOS-compatible nonvolatile storage element in series with storage capacitor
11/01/2011US8050073 Semiconductor memory device
11/01/2011US8049535 Sense amplifier for low voltage high speed sensing
10/2011
10/27/2011WO2011130835A1 Status indication in a system having a plurality of memory devices
10/27/2011US20110261638 Method for Storing Data into a Memory
10/27/2011US20110261637 Increased dram-array throughput using inactive bitlines
10/27/2011US20110261635 Differential Threshold Voltage Non-Volatile Memory and Related Methods
10/27/2011US20110261634 Differential Threshold Voltage Non-Volatile Memory and Related Methods
10/27/2011US20110261633 Memory with improved data reliability
10/27/2011US20110261632 Combined Write Assist and Retain-Till-Accessed Memory Array Bias
10/27/2011US20110261631 Semiconductor device and data processing system comprising semiconductor device
10/27/2011US20110261628 256 Meg dynamic random access memory
10/27/2011US20110261627 Semiconductor nonvolatile memory device
10/27/2011US20110261614 Semiconductor device
10/27/2011US20110261612 Semiconductor memory apparatus and method for generating programming current pulse
10/27/2011US20110261611 Semiconductor memory apparatus
10/27/2011US20110261610 Nonvolatile memory device and method for controlling the same
10/27/2011US20110261606 Arrays Of Vertically Stacked Tiers Of Non-Volatile Cross Point Memory Cells, Methods Of Forming Arrays Of Vertically Stacked Tiers Of Non-Volatile Cross Point Memory Cells, And Methods Of Reading A Data Value Stored By An Array Of Vertically Stacked Tiers Of Non-Volatile Cross Point Memory Cells
10/27/2011US20110261604 Memory cell and an associated memory device
10/27/2011CA2800612A1 Status indication in a system having a plurality of memory devices
10/26/2011EP2381662A1 Digital audio device and method
10/26/2011EP2381450A1 Semiconductor memory
10/26/2011EP2380175A1 Balancing a signal margin of a resistance based memory circuit
10/26/2011EP2380174A1 Self-tuning of signal path delay in circuit employing multiple voltage domains
10/26/2011EP2016590B1 Non-volatile memory with background data latch caching during read operations and methods therefor
10/26/2011EP1606822B1 Universal memory device having a profile storage unit
10/26/2011CN202018824U Intelligent dialogue sounding
10/26/2011CN202014914U Mnemonic picture frame
10/26/2011CN1941168B Fast pre-charge circuit and method of providing same for memory devices
10/26/2011CN1689109B Dual loop sensing scheme for resistive memory elements
10/26/2011CN102227776A Digitally-controllable delay for sense amplifier
10/26/2011CN101540192B Method and device for preventing data loss in reflow process
10/25/2011US8046645 Bad block identifying method for flash memory, storage system, and controller thereof
10/25/2011US8046644 DRAM testing method
10/25/2011US8045413 High speed DRAM architecture with uniform access latency
10/25/2011US8045412 Multi-stage parallel data transfer
10/25/2011US8045411 Semiconductor memory device with temperature sensing device capable of minimizing power consumption in refresh
10/25/2011US8045410 Memory cell array
10/25/2011US8045409 Semiconductor memory device
10/25/2011US8045408 Semiconductor integrated circuit with multi test
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