Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
05/2013
05/14/2013US8441873 Memory devices and methods of operating memory
05/14/2013US8441872 Memory controller with adjustable width strobe interface
05/14/2013US8441871 Ringback circuit for semiconductor memory device
05/14/2013US8441870 Data strobe signal output driver for a semiconductor memory apparatus
05/14/2013US8441869 Data storage systems and methods using data attribute-based data transfer
05/14/2013US8441868 Semiconductor memory having a read circuit
05/14/2013US8441863 Non-volatile memory device with reconnection circuit
05/14/2013US8441855 Strings of memory cells having string select gates, memory devices incorporating such strings, and methods of accessing and forming the same
05/14/2013US8441854 Nonvolatile memory apparatus capable of reducing current consumption and related driving method
05/14/2013US8441849 Reducing programming time of a memory cell
05/14/2013US8441053 Vertical capacitor-less DRAM cell, DRAM array and operation of the same
05/10/2013WO2013066774A1 Data transmission using delayed timing signals
05/10/2013WO2013063687A1 Flash memory module and memory subsystem
05/10/2013CA2854118A1 Flash memory module and memory subsystem
05/09/2013US20130114363 Multi-modal memory interface
05/09/2013US20130114362 Data transmission circuit
05/09/2013US20130114361 Sense amplifier having an isolated pre-charge architecture, a memory circuit incorporating such a sense amplifier and associated methods
05/09/2013US20130114359 Input/output circuit and method of semiconductor apparatus and system with the same
05/09/2013US20130114357 Semiconductor memory apparatus, and successive program control circuit and program method therefor
05/09/2013US20130114356 Semiconductor memory apparatus, and divisional program control circuit and program method therefor
05/09/2013US20130114355 Method for adjusting voltage characteristics of semiconductor memory element, method for adjusting voltage characteristics of semiconductor memory device, charge pump and method for adjusting voltage of charge pump
05/09/2013US20130114354 Nonvolatile memory device and related method of operation
05/09/2013US20130114353 Memory methods and systems with adiabatic switching
05/09/2013US20130114352 Semiconductor memory device
05/09/2013US20130114351 Semiconductor device, semiconductor system having the same and operating method thereof
05/09/2013US20130114350 Semiconductor memory device including initialization signal generation circuit
05/09/2013US20130114349 Semiconductor system including a controller and memory
05/09/2013US20130114347 Semiconductor memory device and semiconductor system
05/09/2013US20130114332 Reducing read disturbs and write fails in a data storage cell
05/09/2013US20130114326 Semiconductor memory apparatus and test circuit therefor
05/09/2013US20130114325 Non-volatile random access memory coupled to a first, second and third voltage and operation method thereof
05/08/2013CN202931553U Loudspeaker with recording pen
05/08/2013CN202931523U Multifunctional microphone for news interview
05/08/2013CN202930047U MP3 (Moving Picture Experts Group Audio Layer-3)
05/08/2013CN202930046U Self-reminding card for old people going out
05/08/2013CN202930045U Micro SD (Secure Digital) and USB (Universal Serial Bus) integrated card
05/08/2013CN202930044U U disk module
05/08/2013CN202930035U Vehicle-mounted audio and video high-definition playing system
05/08/2013CN103098136A Line termination methods and apparatus
05/08/2013CN103093804A Integrated Circuit System And Memory System
05/08/2013CN103093803A Recording system of piano
05/08/2013CN103093802A Mechanism for peak power management in a memory
05/08/2013CN103093801A Semiconductor memory device and driving method thereof
05/08/2013CN103093800A Semiconductor memory device
05/08/2013CN103092170A External inserting mobile storage type music firework control system and networking system provided with the same
05/08/2013CN101840725B Signal adjustment system and signal adjustment method
05/08/2013CN101840724B Signal receiver and related voltage compensation method thereof
05/08/2013CN101789259B Order-based layered data processing method and device applied to flash memory
05/08/2013CN101627435B Read disturb reduction circuit for spin transfer torque magnetoresistive random access memory
05/08/2013CN101553876B Non-volatile memory serial core architecture
05/08/2013CN101506896B Method and apparatus for memory array incorporating two data busses for memory array block selection
05/07/2013US8438358 System-on-chip with memory speed control core
05/07/2013US8437211 Semiconductor system and device, and method for controlling refresh operation of stacked chips
05/07/2013US8437210 Asymmetric sense amplifier design
05/07/2013US8437207 Apparatus for measuring data setup/hold time
05/07/2013US8437206 Latency circuit and semiconductor device comprising same
05/07/2013US8437205 Semiconductor memory apparatus
05/07/2013US8437204 Memory array with corresponding row and column control signals
05/07/2013US8437203 Nonvolatile memory apparatus and method for processing configuration information thereof
05/07/2013US8437202 I/O circuit with phase mixer for slew rate control
05/07/2013US8437200 Zeroization verification of integrated circuit
05/07/2013US8437190 Interleaved flash storage system and method
05/07/2013US8437187 Semiconductor integrated circuit including memory cells having non-volatile memories and switching elements
05/07/2013US8437163 Memory dies, stacked memories, memory devices and methods
05/02/2013WO2013062596A1 Row shifting shiftable memory
05/02/2013WO2013062559A1 Shiftable memory employing ring registers
05/02/2013WO2013061191A1 Conditioning phase change memory cells
05/02/2013WO2013013549A9 Adaptive record caching for solid state disks
05/02/2013US20130107653 Nonvolatile memory having stacked structure and related method of operation
05/02/2013US20130107652 Semiconductor memory device
05/02/2013US20130107651 Semiconductor device with reduced leakage current and method for manufacture the same
05/02/2013US20130107650 Semiconductor device having hierarchical bit line structure
05/02/2013US20130107648 Memory device, semiconductor memory device and control method thereof
05/02/2013US20130107647 Semiconductor device and method of operating the same
05/02/2013US20130107646 Semiconductor device and testing method thereof
05/02/2013US20130107645 Nonvolatile Memory And Writing Method Thereof, And Semiconductor Device
05/02/2013US20130107643 Semiconductor memory device and driving method thereof
05/02/2013US20130107641 Semiconductor system including semiconductor device
05/02/2013US20130107640 Apparatuses, integrated circuits, and methods for measuring leakage current
05/02/2013US20130107639 Semiconductor memory device and operation method thereof
05/02/2013US20130107638 Semiconductor storage device
05/02/2013US20130107637 Memory Program Discharge Circuit of Bit Lines With Multiple Discharge Paths
05/02/2013US20130107636 Semiconductor memory device
05/02/2013US20130107622 Sequence detection for flash memory with inter-cell interference
05/01/2013EP2587486A2 Time division multiplexed multiport memory
05/01/2013EP2587485A1 A dual-port memory and a method thereof
05/01/2013EP2586029A2 Memory write operation methods and circuits
05/01/2013EP2586028A2 A method and apparatus for dynamic memory termination
05/01/2013CN202918603U Touch-based U disk
05/01/2013CN202918353U Separating type mobile phone storage device
05/01/2013CN202917180U Novel mining recording circuit
05/01/2013CN202917179U 手表式播放器 Watch-style player
05/01/2013CN202917178U Encrypt security USB (universal series bus) flash disc and UDP (user datagram protocol) module
05/01/2013CN202917177U USB flash disk with earphone
05/01/2013CN202917176U Hand-operated tool for recording program
05/01/2013CN202917169U Wireless audio frequency adapter based on USB interface
05/01/2013CN103081434A Smart memory
05/01/2013CN103077736A OCD (off-chip driver) module compatible with DDR2 (double data rate 2) and DDR3 (double data rate 3)
05/01/2013CN102047340B Apparatus and method for multi-phase clock generation
05/01/2013CN101859605B Method using flaw flash memory
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