Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
07/2013
07/17/2013CN203070769U Automatic denoising device for audio playing and audio player
07/17/2013CN203070768U Positioning MP3 for the old
07/17/2013CN203070767U Universal serial bus (USB) flash disk
07/17/2013CN203070766U Mobile hard disk drive
07/17/2013CN203070765U U (Universal Serial Bus) disk capable of independently copying data
07/17/2013CN203070764U Storage device
07/17/2013CN103209367A Intelligent MP3 plug-in card speaker
07/17/2013CN103208302A Memory device and method for selecting regional bit line in the memory device
07/17/2013CN103208301A Follow-up dose accommodating device for radiation-proof storage
07/17/2013CN103208300A Sense amplifier comparison circuit
07/17/2013CN101410814B Daisy chain arrangement of non-volatile memories
07/16/2013US8490093 Managed control of processes including privilege escalation
07/16/2013US8488686 Communication channel calibration with nonvolatile parameter store for recovery
07/16/2013US8488404 Counter control signal generator and refresh circuit
07/16/2013US8488403 Sense-amplification with offset cancellation for static random access memories
07/16/2013US8488402 Nonvolatile memory device and method of reading the same using different precharge voltages
07/16/2013US8488401 Semiconductor storage device
07/16/2013US8488400 Multi-port memory device
07/16/2013US8488399 Semiconductor devices having a three-dimensional stacked structure and methods of de-skewing data therein
07/16/2013US8488398 Threshold voltage digitizer for array of programmable threshold transistors
07/16/2013US8488397 Increased capacity heterogeneous storage elements
07/16/2013US8488396 Dual rail static random access memory
07/16/2013US8488395 Keepers, integrated circuits, and systems thereof
07/16/2013US8488394 Semiconductor device
07/16/2013US8488393 Semiconductor memory device and test method thereof
07/16/2013US8488392 Semiconductor memory device and method of operating the same
07/16/2013US8488391 Memory chip with buffer controlled based upon the last address cycle
07/16/2013US8488390 Circuits and methods for memory
07/16/2013US8488358 Semiconductor storage device
07/11/2013WO2013103516A1 Reference averaging for mram sense amplifiers
07/11/2013WO2013102808A1 Enhanced power savings for memory arrays
07/11/2013WO2013102255A1 Device selection schemes in multi chip package nand flash memory system
07/11/2013US20130179821 High speed logging system
07/11/2013US20130179633 Scatter-gather intelligent memory architecture for unstructured streaming data on multiprocessor systems
07/11/2013US20130176804 Method and apparatus for reducing current consumption by memory refresh operation control
07/11/2013US20130176803 Semiconductor memory device and refresh method thereof
07/11/2013US20130176802 Semiconductor memory device
07/11/2013US20130176801 Precharge circuit and semiconductor memory device having the same
07/11/2013US20130176798 Mechanism for peak power management in a memory
07/11/2013US20130176797 Data output circuit
07/11/2013US20130176796 Semiconductor memory device and method of writing into semiconductor memory device
07/11/2013US20130176795 Enhanced Power Savings for Memory Arrays
07/11/2013US20130176774 System and method of reference cell testing
07/11/2013US20130176773 Reference Averaging for MRAM Sense Amplifiers
07/11/2013US20130176767 Storage element reading using ring oscillator
07/11/2013DE102004001434B4 Speicherbauelement Memory device
07/10/2013EP2612358A2 Buffer die in stacks of memory dies and methods
07/10/2013EP2612326A1 Channel skewing
07/10/2013CN203057513U Wireless hearing aid with playing and recording function
07/10/2013CN203057510U Hearing aid with music playing function
07/10/2013CN203056157U USB (universal serial bus) interface structure and U disk with same
07/10/2013CN203055465U Portable voice reminder with touch screen
07/10/2013CN203055464U Novel three-key MP4
07/10/2013CN203055463U Player
07/10/2013CN203055462U Backup flash disk
07/10/2013CN203055461U Flash disk integrated hard disk
07/10/2013CN203055460U Safe U-disk with anti-loss function
07/10/2013CN203055459U Multifunctional U-disk
07/10/2013CN203055458U Data random access memory with LVDS (low voltage differential signaling) interface
07/10/2013CN203055457U U disc with cutting sleeve
07/10/2013CN203055456U Fluorescent memory card
07/10/2013CN203055455U Novel read/storage equipment
07/10/2013CN203055454U Flash disk
07/10/2013CN203055453U Novel multifunctional USB (Universal Serial Bus) disc
07/10/2013CN203046517U USB (Universal Serial Bus) flash memory bookmark
07/10/2013CN103198856A DDR (Double Data Rate) controller and request scheduling method
07/10/2013CN103198855A Automatic noise reduction method and apparatus for playing of audio and audio player
07/10/2013CN103198854A Block RAM (random-access memory) with multiple Write-Modes in FPGA (field programmable gate array)
07/10/2013CN103198853A Semiconductor device and method for accelerating erase verification procedure by the same
07/10/2013CN103190745A Multifunctional badge
07/10/2013CN102013268B Bit line adjusting method and unit as well as sensitive amplifier
07/10/2013CN101916584B Flash memory device and collocation method thereof
07/10/2013CN101685665B Mobile storage device and connector thereof
07/09/2013US8484501 System for delay locked loop control that provides delay interval stabilization
07/09/2013US8484451 Method and apparatus for software boot revocation
07/09/2013US8483001 Level detector, internal voltage generator including level detector, and semiconductor memory device including internal voltage generator
07/09/2013US8483000 Semiconductor device
07/09/2013US8482999 Semiconductor memory integrated device having a precharge circuit with thin-film transistors gated by a voltage higher than a power supply voltage
07/09/2013US8482998 Storage device and method for controlling storage device
07/09/2013US8482997 Method of manufacturing non-volatile memory module
07/09/2013US8482996 Nonvolatile memory apparatus with changeable operation speed and related signal control method
07/09/2013US8482995 Circuit for transmitting and receiving data and control method thereof
07/09/2013US8482992 Method of controlling operations of a delay locked loop of a dynamic random access memory
07/09/2013US8482991 Semiconductor device
07/09/2013US8482990 Memory edge cell
07/09/2013US8482989 Semiconductor device including fuse array and method of operation the same
07/09/2013US8482973 Nonvolatile memory cell operating by increasing order in polycrystalline semiconductor material
07/09/2013US8482341 Booster circuit, semiconductor device, and electronic apparatus
07/09/2013US8482315 One-of-n N-nary logic implementation of a storage cell
07/04/2013WO2013101554A1 Metablock size reduction using on chip page swapping between planes
07/04/2013WO2013101459A1 Sharing local control lines across multiple planes in a memory device
07/04/2013WO2013101286A1 Key management using quasi out of band authentication architecture
07/04/2013WO2013101209A1 Thin translation for system access of non volatile semicondcutor storage as random access memory
07/04/2013WO2013100982A1 Apparatus and method for improving power delivery in a memory, such as, a random access memory
07/04/2013WO2013100956A1 Memory timing optimization using pattern based signaling modulation
07/04/2013US20130170309 Sense-amplifier circuit of memory and calibrating method thereof
07/04/2013US20130170306 Memory architecture and design methodology with adaptive read
07/04/2013US20130170304 Memory interface circuit and semiconductor device
07/04/2013DE10251670B4 Einschaltsignalgenerator für Halbleiterspeichereinrichtungen Einschaltsignalgenerator for semiconductor memory devices
07/04/2013DE102007060710B4 Verfahren in einem halbleiterspeicherbauelement zum steuern der verbindung eines leseverstärkers mit und der trennung von einem ersten bzw. zweiten speicherarraysegment und entsprechende steuerschaltungen A method in a semiconductor memory device for controlling the connection with a sense amplifier and the separation of a first and second memory array segment and corresponding control circuits
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