Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
08/2013
08/14/2013CN203121832U Wooden cooling pillow capable of playing music
08/14/2013CN103247328A Identification method of memory cell and sense amplifier
08/14/2013CN103247327A Portable sound recorder having thin film solar cell
08/14/2013CN103247326A Active safe USB (Universal Serial Bus) flash disk
08/14/2013CN103247325A Flash memory with serial I/O interface
08/14/2013CN103247324A Flash memory with serial interface and design method thereof
08/14/2013CN103247323A Flash memory with serial interface
08/14/2013CN103247305A Cassette player with voice frequency memory function
08/14/2013CN102420007B Word line biasing circuit
08/14/2013CN101751980B Embedded programmable memory based on memory IP core
08/14/2013CN101540189B Semiconductor device having single-ended sensing amplifier
08/14/2013CN101286358B System and device with error detection/correction process and method outputting data
08/14/2013CN101156211B Register read for volatile memory
08/13/2013US8510849 Data protection systems and methods
08/13/2013US8510814 Method and apparatus for network authentication of human interaction and user identity
08/13/2013US8509021 Methods, circuits, and systems to select memory regions
08/13/2013US8509020 Data processing system
08/13/2013US8509019 Voltage generation circuit and nonvolatile memory device including the same
08/13/2013US8509018 Sense amplifier with adjustable back bias
08/13/2013US8509017 Memory device and related operating methods
08/13/2013US8509015 Using a precharge characteristics of a node to validate a previous data/signal value represented by a discharge of said node
08/13/2013US8509014 Mechanisms for built-in self repair of memory devices using failed bit maps and obvious repairs
08/13/2013US8509013 Partitioned bitline for memory
08/13/2013US8509012 Precharge signal generation circuit of semiconductor memory apparatus
08/13/2013US8509011 Command paths, apparatuses, memories, and methods for providing internal commands to a data path
08/13/2013US8509010 Input/output circuit and method of semiconductor apparatus and system with the same
08/13/2013US8509007 Hybrid read scheme for multi-level data
08/13/2013US8509006 Semiconductor device and method of detecting abnormality on semiconductor device
08/13/2013US8509005 Data strobe signal generating device and a semiconductor memory apparatus using the same
08/13/2013US8509004 Nonvolatile logic circuit, integrated circuit including the nonvolatile logic circuit, and method of operating the integrated circuit
08/13/2013US8508974 Ferroelectric memory with shunt device
08/13/2013US8508968 Semiconductor apparatus
08/13/2013CA2415218C Method and apparatus for synchronization of row and column access operations
08/08/2013WO2013115783A1 Memory module buffer data storage
08/08/2013WO2013115778A1 Dynamic/static random access memory (d/sram)
08/08/2013US20130205157 Data transfer operation completion detection circuit and semiconductor memory device provided therewith
08/08/2013US20130205100 Multi-port memory based on dram core
08/08/2013US20130201775 Single-strobe operation of memory devices
08/08/2013US20130201774 Semiconductor memory device, method of controlling read preamble signal thereof, and data transmission system
08/08/2013US20130201773 Nonvolatile memory device
08/08/2013US20130201772 Low voltage efuse programming circuit and method
08/08/2013US20130201771 Volatile Memory with a Decreased Consumption
08/08/2013US20130201770 Memory with deferred fractional row activation
08/08/2013US20130201769 Nonvolatile memory apparatus, program method thereof, and data processing system using the same
08/08/2013US20130201767 Semiconductor memory apparatus, operating method thereof, and data processing system using the same
08/08/2013US20130201766 Volatile Memory with a Decreased Consumption and an Improved Storage Capacity
08/08/2013US20130201765 Power mixing circuit and semiconductor memory device including the same
08/08/2013US20130201751 Multi-port memory based on dram core
08/08/2013US20130201744 Dma architecture for nand-type flash memory
08/08/2013DE112011103645T5 Verfahren und Vorrichtung zum Durchführen einer Speicherschnittstellenkalibrierung Method and apparatus for performing a calibration memory interface
08/07/2013EP2624530A1 Method and apparatus for controlling temperature of data card
08/07/2013EP2622603A1 Sense amplifier with selectively powered inverter
08/07/2013CN203119509U Storage
08/07/2013CN203118489U Fingerprint music player
08/07/2013CN203118488U Audio input and output circuit
08/07/2013CN203118487U Timing sequence tracking circuit
08/07/2013CN203118486U U disk used for cleaning USB (universal serial bus) interface
08/07/2013CN203118485U U (universal serial bus) flash disc
08/07/2013CN203118484U Wireless memory
08/07/2013CN203118483U USB flash disk
08/07/2013CN203118482U U disk with torch
08/07/2013CN203118481U Expandable USB (Universal Serial Bus) memory
08/07/2013CN203118480U Portable memorizer capable of displaying size of stored data
08/07/2013CN203118479U USB (Universal Serial Bus) memory
08/07/2013CN103236268A Hanging painting with playing function
08/07/2013CN103235770A Solid-state memory based on ultra-wide digital interface
08/07/2013CN102122525B Readout amplifying circuit for resistive random access memory (RRAM) cell
08/07/2013CN101964205B ECC (Error Correction Code) module dynamic multiplexing system and method based on solid state disk
08/07/2013CN101814312B Dual loop sensing scheme for resistive memory elements
08/07/2013CN101727963B Audio frequency play device having fixed phone and wireless mobile double-network interconnection function
08/07/2013CN101568970B Memory device, memory system and method
08/06/2013US8505103 Hardware trust anchor
08/06/2013US8503263 Memory module and power supply system
08/06/2013US8503262 Semiconductor device including memory cells that require refresh operation
08/06/2013US8503261 Semiconductor device
08/06/2013US8503258 Stacked device remapping and repair
08/06/2013US8503257 Read disturb scorecard
08/06/2013US8503256 Column command buffer and latency circuit including the same
08/06/2013US8503255 Semiconductor storage device including plural clock oscillator circuits operating at different frequencies
08/06/2013US8503254 Semiconductor memory device, semiconductor system including the semiconductor memory device, and method for operating the semiconductor memory device
08/06/2013US8503253 Supply voltage generating circuit and semiconductor device having the same
08/06/2013US8503252 Sense amplifier circuit
08/06/2013US8503251 Semiconductor memory device having pipe latch circuit for storing output data during read operation and method for operating the same
08/06/2013US8503250 High speed DRAM architecture with uniform access latency
08/06/2013US8503235 Nonvolatile memory with faulty cell registration
08/06/2013US8503218 Nonvolatile memory device using resistance material and memory system including the nonvolatile memory device
08/01/2013WO2013112580A1 Generating soft read values using multiple reads and/or bins
08/01/2013WO2013112141A1 Storage system device management
08/01/2013WO2013110847A1 Apparatus and method to provide cache move with non-volatile mass memory system
08/01/2013WO2013110802A1 Method of managing requests for access to memories and data storage system
08/01/2013US20130194886 Physical unclonable function with improved start-up behavior
08/01/2013US20130194885 Spurious induced charge cleanup for one time programmable (otp) memory
08/01/2013US20130194884 Synchronous Global Controller For Enhanced Pipelining
08/01/2013US20130194882 Semiconductor device having timing control for read-write memory access operations
08/01/2013US20130194881 Area-efficient multi-modal signaling interface
08/01/2013US20130194880 Reading memory data
08/01/2013US20130194879 Early Read After Write Operation Memory Device, System And Method
08/01/2013US20130194877 Memory and method of operating the same
08/01/2013US20130194876 Built-in self-test circuit applied to high speed i/o port
08/01/2013US20130194860 Tracking for Write Operations of Memory Devices
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