Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 5 - Details of stores covered by group
Patents for G11C 5 - Details of stores covered by group (20,391)
05/2014
05/21/2014CN103814628A 用于3d封装的电压调节以及制造其的方法 Voltage regulator for 3d package, and manufacturing method thereof
05/21/2014CN102334164B 开关电容器电压转换器 A switched capacitor voltage converter
05/21/2014CN102144262B 存储卡适配器 Memory Card Adapter
05/21/2014CN101635162B 堆叠存储器模块和系统 The stacked memory modules and systems
05/20/2014US8730753 Nonvolatile semiconductor memory device
05/20/2014US8730752 Circuits and methods for placing programmable impedance memory elements in high impedance states
05/20/2014US8730745 Semiconductor device and method for controlling the same
05/20/2014US8730742 Device
05/15/2014WO2014072770A1 Method and apparatus for performing state retention for at least one functional block within an ic device
05/15/2014WO2014071695A1 Electronic equipment
05/15/2014WO2014071694A1 Storage device
05/15/2014WO2014071497A1 Method and apparatus for pll locking control in daisy chained memory system
05/15/2014WO2013052372A8 Stub minimization for multi-die wirebond assemblies with parallel windows
05/15/2014US20140133258 Secondary memory device and electronic system employing the same
05/15/2014US20140133257 Back-up power management for efficient battery usage
05/15/2014US20140133256 Voltage generation circuit of semiconductor memory apparatus
05/15/2014US20140133219 Power Line Lowering for Write Assisted Control Scheme
05/15/2014US20140133211 Resistive random access memory equalization and sensing
05/15/2014US20140133209 Memory architectures having wiring structures that enable different access patterns in multiple dimensions
05/15/2014US20140133208 Memory architectures having wiring structures that enable different access patterns in multiple dimensions
05/15/2014DE10262374B4 System zur Erzeugung und Verteilung von Versorgungsspannungen in Speichersystemen A system for generation and distribution of supply voltages in memory systems
05/15/2014DE102005046134B4 Verfahren zur Informationsweiterleitung bei elektronischen Bausteinen und entsprechend ausgestaltete Baugruppe A method for forwarding information in electronic components and appropriately designed module
05/15/2014DE102004042130B4 Verfahren und Anordnung zur Kernspannungs-Bereitstellung aus einer höheren Betriebsspannung Method and system for providing core voltage from a higher operating voltage
05/14/2014EP2731108A2 Architecture for three dimensional non-volatile storage with vertical bit lines
05/14/2014CN103797537A 多装置存储器串联架构 Multi-device memory series architecture
05/13/2014US8724422 System and method for charging back-up charge storage element for data storage device using spindle phase switching elements
05/13/2014US8724421 Dual rail power supply scheme for memories
05/13/2014US8724404 Memory, supply voltage generation circuit, and operation method of a supply voltage generation circuit used for a memory array
05/13/2014US8724385 Semiconductor device
05/13/2014US8724374 Data-dependent pullup transistor supply and body bias voltage application for a static random access memory (SRAM) cell
05/13/2014US8724373 Apparatus for selective word-line boost on a memory cell
05/13/2014US8724362 Transistor circuit layout structure
05/13/2014US8724361 DMA architecture for NAND-type flash memory
05/13/2014US8724360 Wiring configuration of a bus system and power wires in a memory chip
05/08/2014US20140126314 Memory Architecture With Local And Global Control Circuitry
05/08/2014US20140126265 Semiconductor memory devices
05/08/2014DE112012003422T5 Vorrichtungen, Geräte und Verfahren zum Erkennen eines Snapback-Ereignisses in einer Schaltung Devices, apparatus, and method for detecting a snap-back event in a circuit
05/07/2014CN103782383A 偏差补偿的多晶片封装 Deviation Compensation multi-chip package
05/07/2014CN103778943A 一次编程元胞结构及其构成的晶体管阵列 Once programmed cellular structure and transistor array consisting of
05/07/2014CN102005453B 三维结构存储器 Three-dimensional structure of the memory
05/06/2014US8719665 Programming error correction code into a solid state memory device with varying bits per cell
05/06/2014US8717839 Semiconductor device having plural penetration electrodes penetrating through semiconductor substrate and testing method thereof
05/06/2014US8717814 3-D nonvolatile memory device and method of manufacturing the same, and memory system including the 3-D nonvolatile memory device
05/06/2014US8717798 Layout for semiconductor memories
05/06/2014US8717797 Semiconductor memory device with hierarchical bitlines
05/06/2014US8717796 Memory dies, stacked memories, memory devices and methods
05/06/2014US8717795 Semiconductor device having plural circuit blocks operating at the same timing
05/01/2014WO2014065524A1 3d semiconductor device having cache memory array in which chapter data can be saved and method for operating same
05/01/2014WO2013166410A3 Computer-readable media for logical clustering of package data and derived analytics and sharing of sensor information
05/01/2014US20140119147 Segmented memory having power-saving mode
05/01/2014US20140119146 Clock Gated Storage Array
05/01/2014US20140119137 Method and apparatus for dynamically adjusting voltage reference to optimize an i/o system
05/01/2014US20140119136 Method and apparatus for sharing internal power supplies in integrated circuit devices
05/01/2014US20140119123 Fault tolerant control line configuration
05/01/2014US20140119092 Programmable lsi
05/01/2014US20140119091 Bit-line sense amplifier, semiconductor memory device and memory system including the same
05/01/2014US20140119090 Stacked dynamic random access memory
04/2014
04/30/2014CN103765517A Power supply circuit and polarity reversal protection circuit
04/30/2014CN102339636B Semiconductor memory device and method of driving the same
04/30/2014CN102157187B Method and device for memory resource management in chip
04/30/2014CN101354907B Multi-chip package reducing power-up peak current
04/29/2014US8713349 Semiconductor apparatus
04/29/2014US8711650 Semiconductor device including multi-chip
04/29/2014US8711648 Voltage generating system and memory device using the same
04/29/2014US8711646 Architecture, system and method for testing resistive type memory
04/29/2014US8711642 Interleaving charge pumps for programmable memories
04/29/2014US8711607 Semiconductor device
04/29/2014US8711603 Permutational memory cells
04/29/2014US8711598 Memory cell and memory cell array using the same
04/29/2014US8711597 3D solid-state arrangement for solid state memory
04/29/2014US8711596 Memory system with data line switching scheme
04/29/2014US8710904 MOS resistor apparatus and methods
04/29/2014US8710903 Drive and startup for a switched capacitor divider
04/24/2014WO2014062435A1 Non-volatile memory array and method of using same for fractional word programming
04/24/2014US20140112370 Throttling memory in response to an internal temperature of a memory device
04/24/2014US20140112088 Control circuit, memory device and voltage control method thereof
04/24/2014US20140112071 Multi-channel memory and power supply-driven channel selection
04/24/2014US20140112050 Semiconductor devices and methods of fabricating the same
04/24/2014US20140112049 Semiconductor memory device and method for manufacturing the same
04/24/2014US20140112048 N-bit rom cell
04/24/2014US20140112046 Configurable bandwidth memory devices and methods
04/24/2014US20140112045 Memory system incorporating a circuit to generate a delay signal and an associated method of operating a memory system
04/24/2014DE102007046954B4 Steuerung der Spannungsversorgung einer Speicherzelle aufgrund von Fehlerermittlung Controlling the voltage supply of a memory cell due to error detection
04/23/2014CN103748630A Apparatuses, devices and methods for sensing a snapback event in a circuit
04/22/2014US8707071 Power management method for controlling communication interface to enter/leave power-saving mode and related device thereof
04/22/2014US8705309 State-monitoring memory element
04/22/2014US8705268 Quantifying the read and write margins of memory bit cells
04/22/2014US8705262 Stacked memory device for a configurable bandwidth memory interface
04/22/2014US8705261 Semiconductor device having dummy bit lines wider than bit lines
04/22/2014US8705260 Circuits and techniques to compensate data signals for variations of parameters affecting memory cells in cross point arrays
04/22/2014US8705259 Resettable memory apparatuses and design
04/17/2014WO2014059082A2 Memory device with reduced on-chip noise
04/17/2014WO2014057033A1 Reference circuit to compensate for pvt variations in single-ended sense amplifiers
04/17/2014US20140104964 Low temperature drift voltage reference circuit
04/17/2014US20140104963 Memory device with reduced on-chip noise
04/17/2014US20140104946 On-chip hv and lv capacitors acting as the second back-up supplies for nvsram auto-store operation
04/17/2014US20140104940 Internal voltage generating circuit of phase change random access memory device and method thereof
04/17/2014US20140104918 Interconnection for memory electrodes
04/17/2014US20140104917 Semiconductor memory device including plurality of memory chips
04/17/2014US20140104916 Semiconductor device having memory cell array divided into plural memory mats
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