Patents
Patents for G11C 5 - Details of stores covered by group (20,391)
05/2013
05/08/2013CN103093799A Card with multiple ic's
05/08/2013CN101727956B Circuit, an adjusting method, and use of a control loop
05/07/2013US8438515 Interchangeable connection arrays for double-sided DIMM placement
05/07/2013US8438329 System and method for optimizing interconnections of components in a multichip memory module
05/07/2013US8437214 Memory cell employing reduced voltage
05/07/2013US8437213 Characterization of bits in a functional memory
05/07/2013US8437192 3D two bit-per-cell NAND flash memory
05/07/2013US8437166 Word line driver cell layout for SRAM and other semiconductor devices
05/07/2013US8437165 Semiconductor memory device and semiconductor device
05/07/2013US8437164 Stacked memory device for a configurable bandwidth memory interface
05/07/2013US8437163 Memory dies, stacked memories, memory devices and methods
05/07/2013US8437162 Semiconductor memory device
05/07/2013US8437161 Information storage system for buildings, structures, or tombstones
05/07/2013US8437160 Multi-stack memory device
05/07/2013US8437019 Image processing apparatus provided with an image memory used by a plurality of boards performing expanded data processings, backup processing method, and storage medium storing program readable by computer
05/07/2013US8436674 Self-scaled voltage booster
05/07/2013CA2683447C Digital broadcast transmitting/receiving system having an improved receiving performance and signal processing method thereof
05/02/2013US20130111130 Memory including a reduced leakage wordline driver
05/02/2013US20130107654 Semiconductor memory apparatus, high voltage generation circuit, and program method thereof
05/02/2013US20130107642 Voltage generator of nonvolatile memory device
05/02/2013US20130107641 Semiconductor system including semiconductor device
05/02/2013US20130107640 Apparatuses, integrated circuits, and methods for measuring leakage current
05/02/2013US20130107632 Mixed Voltage Non-volatile Memory Integrated Circuit With Power Saving
05/02/2013US20130107602 3-d nonvolatile memory devices and methods of manufacturing the same
05/01/2013EP2587484A1 Integrated circuit with configurable output cell
05/01/2013CN101258553B Passive contact-free integrated circuit comprising a flag for monitoring an erasing-programming voltage
04/2013
04/30/2013US8432765 Method and apparatus for managing behavior of memory devices
04/30/2013US8432764 Boost cell supply write assist
04/30/2013US8432749 Semiconductor integrated circuit
04/30/2013US8432723 Nano-electro-mechanical DRAM cell
04/30/2013US8432716 Semiconductor device with non-volatile memory and random access memory
04/25/2013WO2013059808A1 System and method for mram having controlled averagable and isolatable voltage reference
04/25/2013US20130100730 Method and apparatus for word line suppression
04/25/2013US20130100723 Semiconductor memory device and driving method thereof
04/25/2013US20130100722 Three-dimensional non-volatile memory device, memory system including the same, and method of manufacturing the same
04/24/2013CN103066055A Semiconductor device and method for forming the same
04/24/2013CN101540196B 半导体装置 Semiconductor device
04/23/2013US8427859 Arrays of vertically stacked tiers of non-volatile cross point memory cells, methods of forming arrays of vertically stacked tiers of non-volatile cross point memory cells, and methods of reading a data value stored by an array of vertically stacked tiers of non-volatile cross point memory cells
04/23/2013US8427856 Semiconductor device having bit lines and local I/O lines
04/23/2013US8427855 Semiconductor nanocrystal composite
04/18/2013WO2013055332A1 Select device for cross point memory structures
04/18/2013US20130097449 Memory unit, information processing device, and method
04/18/2013US20130094340 Data protection system
04/18/2013US20130094318 Energy Efficient Processor Having Heterogeneous Cache
04/18/2013US20130094305 Device for supplying a high erase program voltage to an integrated circuit
04/18/2013US20130094273 3d memory and decoding technologies
04/18/2013US20130094272 Device
04/18/2013US20130094271 Connection of multiple semiconductor memory devices with chip enable function
04/17/2013CN103050144A Power supply transmission circuit of memory card
04/17/2013CN102171761B Timing processing method and circuit for synchronous static random accessible memory (SRAM)
04/16/2013US8422328 Semiconductor device, semiconductor system including the same, and voltage supply method of semiconductor device
04/16/2013US8422325 Precharge control circuit and integrated circuit including the same
04/16/2013US8422317 Self-powered detection device with a non-volatile memory
04/16/2013US8422316 Semiconductor device and data processing system
04/16/2013US8422274 Semiconductor storage device and method of fabricating the same
04/16/2013US8422264 Distributed flash memory storage manager systems
04/16/2013US8422263 Load reduced memory module and memory system including the same
04/16/2013US8422262 Generating ROM bit cell arrays
04/11/2013WO2013052688A1 Energy efficient memory with reconfigurable decoding
04/11/2013WO2013052458A1 Memory modules in packages
04/11/2013WO2013052448A1 Stub minimization for wirebond assemblies without windows
04/11/2013WO2013052373A1 Stub minimization for multi-die wirebond assemblies with parallel windows
04/11/2013WO2013052347A1 Memory module in a package and its pin configuration
04/11/2013WO2013052323A1 Stub minimization using duplicate sets of terminals for wirebond assemblies without windows
04/11/2013WO2013052322A2 Stub minimization using duplicate sets of terminals for wirebond assemblies without windows
04/11/2013US20130091364 Random access memory module with driving voltage adaptor and computing apparatus
04/11/2013US20130088932 Semiconductor memory device
04/11/2013US20130088908 Semiconductor device
04/11/2013US20130088907 Transistor circuit layout structure
04/10/2013EP2577668A2 Memory arrays
04/10/2013CN103035279A Transmission line structure capable of eliminating DDR3 (Double Data Rate 3) load difference influence as well as forming method and internal storage structure thereof
04/10/2013CN103035278A Layout of memory cells
04/10/2013CN101350216B Method, system and device for reduced signal level support for memory devices
04/10/2013CN101189679B Structure and method for biasing phase change memory array for reliable writing
04/09/2013US8416633 SRAM leakage reduction circuit
04/09/2013US8416632 Bitline precharge voltage generator, semiconductor memory device comprising same, and method of trimming bitline precharge voltage
04/09/2013US8416631 Internal voltage generator circuit and semiconductor memory device using the same
04/09/2013US8415730 Selective coupling of voltage feeds for body bias voltage in an integrated circuit device
04/04/2013US20130083613 Method and Apparatus of Reducing Leakage Power in Multiple Port SRAM Memory Cell
04/04/2013US20130083610 Energy efficient memory with reconfigurable decoding
04/04/2013US20130083585 Memory device interface methods, apparatus, and systems
04/04/2013US20130083584 Stub minimization with terminal grids offset from center of package
04/04/2013US20130083583 Stub minimization for multi-die wirebond assemblies with parallel windows
04/04/2013US20130083582 Stub minimization for assemblies without wirebonds to package substrate
04/04/2013US20130082764 Apparatus and method to combine pin functionality in an integrated circuit
04/03/2013EP2575138A2 Semiconductor device and system
04/03/2013CN103021444A Memory device
04/03/2013CN102157188B Integrated circuit with separate supply voltage for memory that is different from logic circuit supply voltage
04/02/2013US8412906 Memory apparatus supporting multiple width configurations
04/02/2013US8411526 Storage device, electronic device, and storage device control method
04/02/2013US8411525 Memory circuits having a diode-connected transistor with back-biased control
04/02/2013US8411515 Semiconductor memory
04/02/2013US8411480 Semiconductor device
04/02/2013US8411479 Memory circuits, systems, and methods for routing the memory circuits
04/02/2013US8411478 Three-dimensional stacked semiconductor integrated circuit
04/02/2013US8411477 Arrays of vertically stacked tiers of non-volatile cross point memory cells, methods of forming arrays of vertically stacked tiers of non-volatile cross point memory cells, and methods of reading a data value stored by an array of vertically stacked tiers of non-volatile cross point memory cells
03/2013
03/28/2013WO2013043602A2 High endurance non-volatile storage
03/28/2013WO2013042286A1 Semiconductor device
03/28/2013WO2013040680A1 Voltage regulation for 3d packages and methods of manufacturing same
03/28/2013US20130077375 Layout for semiconductor memories
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