Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 5 - Details of stores covered by group
Patents for G11C 5 - Details of stores covered by group (20,391)
12/2014
12/30/2014US8921991 Discrete three-dimensional memory
12/25/2014US20140376322 Retention of data during stand-by mode
12/24/2014CN102334165B 用于存储器阵列的动态泄漏控制 Leakage control for dynamic memory array
12/24/2014CN102210022B 包括多个封装的半导体芯片的固态驱动器或者其它存储装置 Includes a plurality of encapsulated solid state drive of the semiconductor chip or other memory device
12/23/2014US8917571 Configurable-width memory channels for stacked memory structures
12/23/2014US8917564 Three-dimensional semiconductor memory device having compensating data skewing according to interlayer timing delay and method of de-skewing data therein
12/23/2014US8917561 Canary based SRAM adaptive voltage scaling (AVS) architecture and canary cells for the same
12/23/2014US8917532 Stub minimization with terminal grids offset from center of package
12/18/2014US20140369148 Memory module and memory system
12/18/2014US20140369140 Internal voltage generating circuit capable of controlling swing width of detection signal in semiconductor memory apparatus
12/18/2014US20140369104 Memory device
12/16/2014US8913459 Semiconductor device including plural chips stacked to each other
12/16/2014US8913443 Voltage regulation for 3D packages and method of manufacturing same
12/16/2014US8913436 Non-volatile memory (NVM) with word line driver/decoder using a charge pump voltage
12/16/2014US8913414 Semiconductor apparatus and semiconductor system for outputting internal information according to various mode and method for outputting internal information thereof
12/16/2014US8913413 Memory system with sectional data lines
12/11/2014US20140365723 Resistance memory device and apparatus, fabrication method thereof, operation method thereof, and system having the same
12/11/2014US20140362656 Memory with low current consumption and method for reducing current consumption of a memory
12/11/2014US20140362655 Semiconductor integrated circuit and information processing apparatus
12/11/2014US20140362635 Capacitor backup for sram
12/11/2014US20140362631 Storage circuit
12/11/2014US20140362630 Method for improving bandwidth in stacked memory devices
12/11/2014US20140362629 Single package dual channel memory with co-support
12/10/2014CN102483948B 具有改进型存储器块切换的半导体存储器 A semiconductor memory improved memory block switching
12/10/2014CN102208861B 供电控制电路及包括该供电控制电路的半导体装置 Power supply control circuit and semiconductor device including the power supply control circuit
12/09/2014US8910002 NAND flash-based storage device with built-in test-ahead for failure anticipation
12/09/2014US8909852 Disabling write protection on a serial peripheral interface chip
12/09/2014US8908464 Protection for system configuration information
12/09/2014US8908462 Semiconductor device including current compensator
12/09/2014US8908448 Semiconductor memory apparatus and method of controlling external voltage using the same
12/09/2014US8908419 Semiconductor storage device and method of fabricating the same
12/09/2014US8908411 Semiconductor device
12/09/2014US8908410 Nonvolatile semiconductor memory device
12/09/2014US8907499 Three dimensional structure memory
12/04/2014US20140355370 Semiconductor system and semiconductor package
12/04/2014US20140355327 Memory module and memory system having the same
12/04/2014US20140355326 Non-volatile memory device
12/04/2014US20140355325 Packaging of High Performance System Topology for NAND Memory Systems
12/04/2014US20140353764 Layout to minimize fet variation in small dimension photolithography
12/02/2014US8904161 Memory system and reset method thereof to prevent nonvolatile memory corruption due to premature power loss
12/02/2014US8904046 Apparatus and method for capturing serial input data
12/02/2014US8902692 Dynamic random access memory device with improved control circuitry for the word lines
12/02/2014US8902691 Semiconductor device having charge pump circuit and information processing apparatus including the same
12/02/2014US8902689 Controlling electric power supply to a memory in an image processing apparatus
12/02/2014US8902679 Memory array with on and off-state wordline voltages having different temperature coefficients
12/02/2014US8902678 Voltage regulator
12/02/2014US8902676 Wordline coupling reduction technique
12/02/2014US8902660 Semiconductor devices having wiring with contact pads and dummy lines
12/02/2014US8902625 Layouts for memory and logic circuits in a system-on-chip
12/02/2014US8901746 Methods of manufacturing NAND flash memory devices
12/02/2014US8901567 Semiconductor device and manufacturing method thereof
11/2014
11/27/2014US20140347947 Apparatus and methods to provide power management for memory devices
11/27/2014US20140347946 Voltage regulator
11/27/2014US20140347926 Vertical memory with body connection
11/27/2014US20140347918 MRAM Write Pulses to Dissipate Intermediate State Domains
11/27/2014US20140347908 Semiconductor memory and method of making the same
11/25/2014US8898613 Data processing device
11/25/2014US8898368 Redriven/retimed registered dual inline memory module
11/25/2014US8897093 Controlling method of connector, connector, and memory storage device
11/25/2014US8897092 Memory storage device, memory controller and controlling method
11/25/2014US8897091 High speed digital signal termination circuit
11/25/2014US8897085 Immunity against temporary and short power drops in non-volatile memory: pausing techniques
11/25/2014US8897053 Signal timing alignment based on a common data strobe in memory devices configured for stacked arrangements
11/25/2014US8897052 Memory architecture
11/25/2014US8897051 Semiconductor storage device and method for producing the same
11/25/2014US8897050 Local bit lines and methods of selecting the same to access memory elements in cross-point arrays
11/25/2014US8895437 Method for forming staircase word lines in a 3D non-volatile memory having vertical bit lines
11/20/2014US20140340977 Low power transient voltage collapse apparatus and method for a memory cell
11/20/2014US20140340970 Memory with dynamic feedback control circuit
11/20/2014US20140340953 Semiconductor device
11/18/2014US8892942 Rank sparing system and method
11/18/2014US8892825 Method and system for improving serial port memory communication latency and reliability
11/18/2014US8891685 Reference voltage generator for single-ended communication systems
11/18/2014US8891324 Memory device from which dummy edge memory block is removed
11/18/2014US8891317 Volatile memory with a decreased consumption
11/18/2014US8891281 Programmable LSI
11/18/2014US8891280 Interconnection for memory electrodes
11/18/2014US8891279 Enhanced wiring structure for a cache supporting auxiliary data output
11/18/2014US8891278 Stack position determination in memory devices configured for stacked arrangements
11/18/2014US8891277 Memory device
11/18/2014US8891276 Memory array with local bitlines and local-to-global bitline pass gates and gain stages
11/18/2014US8891275 Stacked dynamic random access memory
11/18/2014US8891274 Semiconductor device
11/18/2014US8890570 Switch block circuit in field programmable gate array
11/18/2014US8890490 Power distributor and semiconductor device having the same
11/18/2014US8890300 Discrete three-dimensional memory comprising off-die read/write-voltage generator
11/18/2014US8890228 Semiconductor device and method of manufacturing the same
11/13/2014US20140337568 Electronic device and method for operating the same
11/13/2014US20140334581 Plural circuit selection using role reversing control inputs
11/13/2014US20140334219 Apparatuses and methods including memory with top and bottom data lines
11/13/2014US20140334217 Nonvolatile semiconductor memory device
11/13/2014US20140334216 General Structure for Computational Random Access Memory (CRAM)
11/11/2014US8886897 Memory system having a plurality of types of memory chips and a memory controller for controlling the memory chips
11/11/2014US8886892 Memory module and method employing a multiplexer to replace a memory device
11/11/2014US8885439 Systems and methods including clock features such as minimization of simultaneous switching outputs (SSO) effects involving echo clocks
11/11/2014US8885436 Semiconductor memory device and method of driving the same
11/11/2014US8885435 Interfacing between integrated circuits with asymmetric voltage swing
11/11/2014US8885434 Retention of data during stand-by mode
11/11/2014US8885422 Hierarchical on-chip memory
11/11/2014US8885401 Load and short current measurement by current summation technique
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