Patents
Patents for G11C 5 - Details of stores covered by group (20,391)
07/2013
07/25/2013US20130188430 Systems and methods for voltage sensing and reporting
07/24/2013CN103222002A Circuit and method for reading a resistive switching device in an array
07/24/2013CN103219043A Non-volatile memory serial core architecture
07/23/2013US8493804 Memory cell array latchup prevention
07/23/2013US8493766 Semiconductor device and method of driving semiconductor device
07/23/2013US8493765 Semiconductor device and electronic device
07/23/2013US8493131 Capacitive touch panel detection circuit and boost circuit thereof
07/18/2013WO2013078294A3 Layouts for memory and logic circuits in a system-on-chip
07/18/2013US20130185575 Semiconductor device for supplying power supply voltage to semiconductor device
07/18/2013US20130182523 Robust sram memory cell capacitor plate voltage generator
07/18/2013US20130182513 Memory system capable of calibrating output voltage level of semiconductor memory device and method of calibrating output voltage level of semiconductor memory device
07/18/2013US20130182511 Digital memory system that dynamically adjusts reference voltage as a function of traffic intensity
07/18/2013US20130182485 Data Storage and Stackable Configurations
07/18/2013US20130182484 Word line and power conductor within a metal layer of a memory cell
07/18/2013US20130182483 Discrete Three-Dimensional Memory Comprising Off-Die Address/Data Translator
07/17/2013EP2615611A2 Multi-mode memory device and method
07/17/2013CN103210448A Magnetic random access memory (mram) layout with uniform pattern
07/16/2013US8489909 Displaying the operating efficiency of a processor
07/16/2013US8489902 Semiconductor integrated circuit
07/16/2013US8488406 Semiconductor device and control method thereof
07/16/2013US8488361 Memory support provided with memory elements of ferroelectric material and improved non-destructive reading method thereof
07/16/2013US8488358 Semiconductor storage device
07/16/2013US8488357 Reference cell architectures for small memory array block activation
07/16/2013US8488356 Memory system with multi-level status signaling and method for operating the same
07/11/2013WO2013043602A3 High endurance non-volatile storage
07/11/2013WO2013003029A3 Multi-element memory device with power control for individual elements
07/11/2013US20130176806 Power-up signal generation circuit
07/11/2013US20130176764 Semiconductor apparatus
07/11/2013US20130176763 Stacked memory with redundancy
07/11/2013DE102004001434B4 Speicherbauelement Memory device
07/10/2013EP2612358A2 Buffer die in stacks of memory dies and methods
07/09/2013US8483006 Programmable addressing circuitry for increasing memory yield
07/09/2013US8483003 Semiconductor device and data processor
07/09/2013US8482993 Apparatus, system, and method for managing data in a solid-state storage device
07/09/2013US8482951 Memory device from which dummy edge memory block is removed
07/09/2013US8482950 Non-volatile semiconductor memory device that changes a load capacitance of a sense node in accordance with a logic value of read information
07/09/2013US8482341 Booster circuit, semiconductor device, and electronic apparatus
07/09/2013US8482120 Combined heat sink multi-configuration processor memory substrate device
07/04/2013WO2013101250A1 Operation aware auto-feedback sram
07/04/2013WO2013101038A1 Heterogeneous memory die stacking for energy efficient computing
07/04/2013WO2013100982A1 Apparatus and method for improving power delivery in a memory, such as, a random access memory
07/04/2013US20130170312 Capacitor power source tamper protection and reliability test
07/04/2013US20130170311 Power Supply, Associated Management Unit and Method
07/04/2013US20130170310 Ultra low power memory cell with a supply feedback loop configured for minimal leakage operation
07/04/2013US20130170275 Dual port sram having reduced cell size and rectangular shape
07/04/2013US20130170274 Semiconductor memory device storing memory characteristic information, memory module and memory system having the same, and operating method thereof
07/04/2013US20130169351 Transistor operating method
07/04/2013US20130169350 Sensing supply voltage swings within an integrated circuit
07/04/2013DE10251670B4 Einschaltsignalgenerator für Halbleiterspeichereinrichtungen Einschaltsignalgenerator for semiconductor memory devices
07/02/2013US8477554 Semiconductor memory device
07/02/2013US8477553 Fuse circuit and semiconductor device having the same
07/02/2013US8477520 Semiconductor memory device
06/2013
06/27/2013WO2013096582A1 Circuit and method for spin-torque mram bit line and source line voltage regulation
06/27/2013WO2013095676A1 Separate microchannel voltage domains in stacked memory architecture
06/27/2013WO2013095675A1 Dynamic memory performance throttling
06/27/2013WO2013095674A1 Memory operations using system thermal sensor data
06/27/2013WO2013095673A1 Self-repair logic for stacked memory architecture
06/27/2013WO2013091104A1 Solid state drive memory system
06/27/2013US20130164921 High-density nonvolatile memory and methods of making the same
06/27/2013US20130163361 Semiconductor memory device
06/27/2013US20130163357 Quantifying the Read and Write Margins of Memory Bit Cells
06/27/2013US20130163305 Apparatuses and methods including memory with top and bottom data lines
06/27/2013US20130163303 Semiconductor device having multi-level wiring structure
06/26/2013EP2608207A1 Semiconductor device with through-silicon vias
06/26/2013CN101783161B Voltage selection circuit, voltage supply circuit and signal delay system
06/26/2013CN101692346B Memory data sampling device and sampling controller
06/25/2013US8473906 Systems and methods for parallel distributed programming
06/25/2013US8472276 System and method for de-latch of an integrated circuit
06/25/2013US8472254 Memory arrays and memory devices
06/25/2013US8472253 Semiconductor memory device
06/25/2013US8472232 Self-identifying stacked die semiconductor components
06/25/2013US8472231 Semiconductor memory device
06/25/2013US8472230 Selective access memory circuit
06/25/2013US8472229 Array-based integrated circuit with reduced proximity effects
06/25/2013US8472228 Array-based integrated circuit with reduced proximity effects
06/25/2013US8472227 Integrated circuits and methods for forming the same
06/25/2013CA2681959C Digital broadcast transmitting/receiving system having an improved receiving performance and signal processing method thereof
06/20/2013WO2013052322A3 Stub minimization using duplicate sets of terminals for wirebond assemblies without windows
06/20/2013US20130155800 Secondary Memory Units and Systems Including the Same
06/20/2013US20130155787 Digital Voltage Boost Circuit
06/20/2013US20130155753 Method for implementing spare logic of semiconductor memory apparatus and structure thereof
06/20/2013US20130155752 Wiring configuration of a bus system and power wires in a memory chip
06/20/2013US20130155751 Memory devices having break cells
06/20/2013US20130155750 Semiconductor storage device
06/19/2013EP2603918A2 System and method to initiate a housekeeping operation at a mobile device
06/19/2013EP2603916A1 Line termination methods and apparatus
06/18/2013US8467261 Implementing smart switched decoupling capacitors to efficiently reduce power supply noise
06/18/2013US8467247 Semiconductor memory device
06/18/2013US8467220 DRAM device and manufacturing method thereof
06/18/2013US8467219 Integrated circuit self aligned 3D memory array and manufacturing method
06/18/2013US8467218 System and apparatus with IC resource interconnect
06/18/2013US8467217 Semiconductor device
06/18/2013US8467216 Semiconductor memory device for reducing bit line coupling noise
06/18/2013US8467215 Permanent solid state memory
06/18/2013US8467214 Semiconductor device having multiport memory
06/13/2013WO2013086193A1 Power manager tile for multi-tile power management integrated circuit
06/13/2013US20130148457 Fast startup hybrid memory module
06/13/2013US20130148456 Voltage regulator with improved load regulation and voltage regulating method
06/13/2013US20130148455 Fine granularity power gating
06/13/2013US20130148447 Reducing Power Consumption in a Memory System
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